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author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-11 19:26:56 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-11 19:26:56 +0000 |
commit | ebe4eae0b3bbf7fc7b011cc7ff7a08afe37e92a0 (patch) | |
tree | c32c2a4c6f3d28c8d393bd3d1a21d3462e6dc7aa /test/CodeGen/X86/vec_shift4.ll | |
parent | da671be7fd01b86311450ce953c539cfcd5f5eb6 (diff) | |
download | llvm-ebe4eae0b3bbf7fc7b011cc7ff7a08afe37e92a0.tar.gz llvm-ebe4eae0b3bbf7fc7b011cc7ff7a08afe37e92a0.tar.bz2 llvm-ebe4eae0b3bbf7fc7b011cc7ff7a08afe37e92a0.tar.xz |
Merging r195971:
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r195971 | juergen | 2013-11-29 22:07:16 -0500 (Fri, 29 Nov 2013) | 2 lines
Force CPU type to unbreak unit tests on Haswell machines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@206049 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_shift4.ll')
-rw-r--r-- | test/CodeGen/X86/vec_shift4.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/X86/vec_shift4.ll b/test/CodeGen/X86/vec_shift4.ll index e2fe45cf97..b266a69875 100644 --- a/test/CodeGen/X86/vec_shift4.ll +++ b/test/CodeGen/X86/vec_shift4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse4.1 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp { entry: |