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| author | Evan Cheng <evan.cheng@apple.com> | 2007-12-15 03:00:47 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-12-15 03:00:47 +0000 |
| commit | 7a831ce85f79a950c3bea2bcfbeda35f9bab9cdb (patch) | |
| tree | 606265dd9805e5c0a9cc8b99a8a94df2bb628f25 /test/CodeGen/X86/vec_shuffle-14.ll | |
| parent | 1d0ba370996d34c351c95414fc2d130e04ae21d1 (diff) | |
| download | llvm-7a831ce85f79a950c3bea2bcfbeda35f9bab9cdb.tar.gz llvm-7a831ce85f79a950c3bea2bcfbeda35f9bab9cdb.tar.bz2 llvm-7a831ce85f79a950c3bea2bcfbeda35f9bab9cdb.tar.xz | |
Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45058 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_shuffle-14.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_shuffle-14.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vec_shuffle-14.ll b/test/CodeGen/X86/vec_shuffle-14.ll new file mode 100644 index 0000000000..6e8d0b8077 --- /dev/null +++ b/test/CodeGen/X86/vec_shuffle-14.ll @@ -0,0 +1,42 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd | count 1 +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movd | count 2 +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep movq | count 3 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xor + +define <4 x i32> @t1(i32 %a) nounwind { +entry: + %tmp = insertelement <4 x i32> undef, i32 %a, i32 0 + %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + ret <4 x i32> %tmp6 +} + +define <2 x i64> @t2(i64 %a) nounwind { +entry: + %tmp = insertelement <2 x i64> undef, i64 %a, i32 0 + %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] + ret <2 x i64> %tmp6 +} + +define <2 x i64> @t3(<2 x i64>* %a) nounwind { +entry: + %tmp4 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1] + %tmp6 = bitcast <2 x i64> %tmp4 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp7 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp6, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + %tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp8 +} + +define <2 x i64> @t4(<2 x i64> %a) nounwind { +entry: + %tmp5 = bitcast <2 x i64> %a to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp5, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] + %tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1] + ret <2 x i64> %tmp7 +} + +define <2 x i64> @t5(<2 x i64> %a) nounwind { +entry: + %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] + ret <2 x i64> %tmp6 +} |