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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-04-02 22:30:39 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-04-02 22:30:39 +0000 |
| commit | e3b23cde80b19507f1d8b641a541e91ace0864dc (patch) | |
| tree | 10806194e6d64949fd2dd95d36f75211a6c7f84c /test/CodeGen/X86/vec_shuffle-37.ll | |
| parent | 8a06af96698537377275dd7848db69915638dd26 (diff) | |
| download | llvm-e3b23cde80b19507f1d8b641a541e91ace0864dc.tar.gz llvm-e3b23cde80b19507f1d8b641a541e91ace0864dc.tar.bz2 llvm-e3b23cde80b19507f1d8b641a541e91ace0864dc.tar.xz | |
Allocate virtual registers in ascending order.
This is just the fallback tie-breaker ordering, the main allocation
order is still descending size.
Patch by Shamil Kurmangaleev!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153904 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vec_shuffle-37.ll')
| -rw-r--r-- | test/CodeGen/X86/vec_shuffle-37.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index 65486cb80c..619652aff1 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -4,10 +4,10 @@ define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { entry: -; CHECK: movaps ({{%rdi|%rcx}}), %xmm0 -; CHECK: movaps %xmm0, %xmm1 -; CHECK-NEXT: movss %xmm2, %xmm1 -; CHECK-NEXT: shufps $36, %xmm1, %xmm0 +; CHECK: movaps ({{%rdi|%rcx}}), %[[XMM0:xmm[0-9]+]] +; CHECK: movaps %[[XMM0]], %[[XMM1:xmm[0-9]+]] +; CHECK-NEXT: movss %xmm{{[0-9]+}}, %[[XMM1]] +; CHECK-NEXT: shufps $36, %[[XMM1]], %[[XMM0]] %0 = load <4 x i32>* undef, align 16 %1 = load <4 x i32>* %a0, align 16 %2 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 2, i32 4> |