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author | Quentin Colombet <qcolombet@apple.com> | 2013-07-30 00:24:09 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2013-07-30 00:24:09 +0000 |
commit | 75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8 (patch) | |
tree | 8d078de34703eaec736eb7137ce1939821713c3a /test/CodeGen/X86/vshift-3.ll | |
parent | 3466fb11b70e5512fe15c94b8da99596e69c39cf (diff) | |
download | llvm-75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8.tar.gz llvm-75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8.tar.bz2 llvm-75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8.tar.xz |
[DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN
The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vshift-3.ll')
-rw-r--r-- | test/CodeGen/X86/vshift-3.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/X86/vshift-3.ll b/test/CodeGen/X86/vshift-3.ll index 9b484a71d1..0bdb32fcb8 100644 --- a/test/CodeGen/X86/vshift-3.ll +++ b/test/CodeGen/X86/vshift-3.ll @@ -55,12 +55,12 @@ entry: ; CHECK: psraw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 - %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 - %3 = insertelement <8 x i16> %0, i16 %amt, i32 3 - %4 = insertelement <8 x i16> %0, i16 %amt, i32 4 - %5 = insertelement <8 x i16> %0, i16 %amt, i32 5 - %6 = insertelement <8 x i16> %0, i16 %amt, i32 6 - %7 = insertelement <8 x i16> %0, i16 %amt, i32 7 + %2 = insertelement <8 x i16> %1, i16 %amt, i32 2 + %3 = insertelement <8 x i16> %2, i16 %amt, i32 3 + %4 = insertelement <8 x i16> %3, i16 %amt, i32 4 + %5 = insertelement <8 x i16> %4, i16 %amt, i32 5 + %6 = insertelement <8 x i16> %5, i16 %amt, i32 6 + %7 = insertelement <8 x i16> %6, i16 %amt, i32 7 %ashr = ashr <8 x i16> %val, %7 store <8 x i16> %ashr, <8 x i16>* %dst ret void |