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| author | Mon P Wang <wangmp@apple.com> | 2009-09-03 19:57:35 +0000 |
|---|---|---|
| committer | Mon P Wang <wangmp@apple.com> | 2009-09-03 19:57:35 +0000 |
| commit | 3653b13c52b9bce4fd9e2da3cbb893fc769adaec (patch) | |
| tree | 04251e42d791ef7d64bcce1762f9b4791c56cfbb /test/CodeGen/X86/vshift-4.ll | |
| parent | efa422023fa750bdef6429e66cc2b628e4d4801b (diff) | |
| download | llvm-3653b13c52b9bce4fd9e2da3cbb893fc769adaec.tar.gz llvm-3653b13c52b9bce4fd9e2da3cbb893fc769adaec.tar.bz2 llvm-3653b13c52b9bce4fd9e2da3cbb893fc769adaec.tar.xz | |
Test cases for vector shifts changes r80935
Changed the old vector shift test to use FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80936 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/vshift-4.ll')
| -rw-r--r-- | test/CodeGen/X86/vshift-4.ll | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/test/CodeGen/X86/vshift-4.ll b/test/CodeGen/X86/vshift-4.ll index 332e8515ad..33ea1fc875 100644 --- a/test/CodeGen/X86/vshift-4.ll +++ b/test/CodeGen/X86/vshift-4.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; RUN: grep psllq %t | count 1 ; RUN: grep pslld %t | count 3 ; RUN: grep psllw %t | count 2 @@ -8,14 +8,19 @@ define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: +; CHECK: shift1a: +; CHECK: psllq %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> %shl = shl <2 x i64> %val, %shamt store <2 x i64> %shl, <2 x i64>* %dst ret void } +; shift1b can't use a packed shift define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { entry: +; CHECK: shift1b: +; CHECK: shll %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> %shl = shl <2 x i64> %val, %shamt store <2 x i64> %shl, <2 x i64>* %dst @@ -24,6 +29,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2a: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -32,6 +39,8 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -40,6 +49,8 @@ entry: define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { entry: +; CHECK: shift2c: +; CHECK: pslld %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> %shl = shl <4 x i32> %val, %shamt store <4 x i32> %shl, <4 x i32>* %dst @@ -48,6 +59,9 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { entry: +; CHECK: shift3a: +; CHECK: movzwl +; CHECK: psllw %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> %shl = shl <8 x i16> %val, %shamt store <8 x i16> %shl, <8 x i16>* %dst @@ -56,6 +70,9 @@ entry: define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 |