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author | Andrew Trick <atrick@apple.com> | 2013-06-25 02:48:58 +0000 |
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committer | Andrew Trick <atrick@apple.com> | 2013-06-25 02:48:58 +0000 |
commit | b2b5dc642cbbe781f73b9da83874d4005c50bd8e (patch) | |
tree | de069755e86d024fd756be8e3bb35301ae437dbc /test/CodeGen/X86/x86-64-psub.ll | |
parent | 73e44d8ae4c227af92b8f96f447e4a7ed38f6de5 (diff) | |
download | llvm-b2b5dc642cbbe781f73b9da83874d4005c50bd8e.tar.gz llvm-b2b5dc642cbbe781f73b9da83874d4005c50bd8e.tar.bz2 llvm-b2b5dc642cbbe781f73b9da83874d4005c50bd8e.tar.xz |
Revert "Temporarily enable MI-Sched on X86."
This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184823 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86/x86-64-psub.ll')
-rw-r--r-- | test/CodeGen/X86/x86-64-psub.ll | 25 |
1 files changed, 9 insertions, 16 deletions
diff --git a/test/CodeGen/X86/x86-64-psub.ll b/test/CodeGen/X86/x86-64-psub.ll index 029eb9cf3a..7869a80b2a 100644 --- a/test/CodeGen/X86/x86-64-psub.ll +++ b/test/CodeGen/X86/x86-64-psub.ll @@ -4,8 +4,8 @@ ; This test checks that the operands of packed sub instructions are ; never interchanged by the "Two-Address instruction pass". -declare { i64, double } @getFirstParam() -declare { i64, double } @getSecondParam() +declare { i64, double } @getFirstParam() +declare { i64, double } @getSecondParam() define i64 @test_psubb() { entry: @@ -28,10 +28,9 @@ entry: ; CHECK: test_psubb: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubb [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -56,10 +55,9 @@ entry: ; CHECK: test_psubw: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubw [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -85,10 +83,9 @@ entry: ; CHECK: test_psubd: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubd [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -113,10 +110,9 @@ entry: ; CHECK: test_psubsb: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubsb [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -141,10 +137,9 @@ entry: ; CHECK: test_psubswv: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubsw [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -169,10 +164,9 @@ entry: ; CHECK: test_psubusbv: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubusb [[PARAM2]], [[PARAM1]] ; CHECK: ret @@ -197,10 +191,9 @@ entry: ; CHECK: test_psubuswv: ; CHECK: callq getFirstParam -; CHECK: movq %rax, [[TEMP:%[a-z0-9]+]] ; CHECK: callq getSecondParam -; CHECK: movd [[TEMP]], [[PARAM1:%[a-z0-9]+]] ; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]] +; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]] ; CHECK: psubusw [[PARAM2]], [[PARAM1]] ; CHECK: ret |