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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-26 22:19:12 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2013-03-26 22:19:12 +0000 |
| commit | 6b359ecd43bbad20f417d7434d72bafccd6c2efe (patch) | |
| tree | 0e74ceda477e61ee7219c3ed211d802cdcaa95ca /test/CodeGen/X86 | |
| parent | d072a166d6c77ebcfb4fde796e0784a56020b9a4 (diff) | |
| download | llvm-6b359ecd43bbad20f417d7434d72bafccd6c2efe.tar.gz llvm-6b359ecd43bbad20f417d7434d72bafccd6c2efe.tar.bz2 llvm-6b359ecd43bbad20f417d7434d72bafccd6c2efe.tar.xz | |
Enable SandyBridgeModel for all modern Intel P6 descendants.
All Intel CPUs since Yonah look a lot alike, at least at the granularity
of the scheduling models. We can add more accurate models for
processors that aren't Sandy Bridge if required. Haswell will probably
need its own.
The Atom processor and anything based on NetBurst is completely
different. So are the non-Intel chips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178080 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
| -rw-r--r-- | test/CodeGen/X86/misched-ilp.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/sink-hoist.ll | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/X86/misched-ilp.ll b/test/CodeGen/X86/misched-ilp.ll index c6cedb7be8..4ca296ca92 100644 --- a/test/CodeGen/X86/misched-ilp.ll +++ b/test/CodeGen/X86/misched-ilp.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s -; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=nocona -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=nocona -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s ; ; Basic verification of the ScheduleDAGILP metric. ; diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 649cd61ab7..2aca5b897d 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally |