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author | Cameron Zwarich <zwarich@apple.com> | 2011-03-11 21:52:04 +0000 |
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committer | Cameron Zwarich <zwarich@apple.com> | 2011-03-11 21:52:04 +0000 |
commit | 899eaa35696bb0a9a625acd70a14876834af6cc5 (patch) | |
tree | 3184b26965b0e0ef67ba636e90fa72e4a555b7a6 /test/CodeGen/X86 | |
parent | 53aac15a607d66926e586c7fc57634f6be4ef443 (diff) | |
download | llvm-899eaa35696bb0a9a625acd70a14876834af6cc5.tar.gz llvm-899eaa35696bb0a9a625acd70a14876834af6cc5.tar.bz2 llvm-899eaa35696bb0a9a625acd70a14876834af6cc5.tar.xz |
Roll r127459 back in:
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.
This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r-- | test/CodeGen/X86/2008-04-16-ReMatBug.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/MachineSink-PHIUse.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/personality.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/pr3366.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/sext-i1.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/X86/zext-extract_subreg.ll | 1 |
6 files changed, 8 insertions, 7 deletions
diff --git a/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/test/CodeGen/X86/2008-04-16-ReMatBug.ll index 6e8891bfd5..bfe8ef53f5 100644 --- a/test/CodeGen/X86/2008-04-16-ReMatBug.ll +++ b/test/CodeGen/X86/2008-04-16-ReMatBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin | grep movw | not grep {, %e} +; RUN: llc < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | grep movw | not grep {, %e} %struct.DBC_t = type { i32, i8*, i16, %struct.DBC_t*, i8*, i8*, i8*, i8*, i8*, %struct.DBC_t*, i32, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, i32*, i8, i16, %struct.DRVOPT*, i16 } %struct.DRVOPT = type { i16, i32, i8, %struct.DRVOPT* } diff --git a/test/CodeGen/X86/MachineSink-PHIUse.ll b/test/CodeGen/X86/MachineSink-PHIUse.ll index 728e377360..3758fd8ce5 100644 --- a/test/CodeGen/X86/MachineSink-PHIUse.ll +++ b/test/CodeGen/X86/MachineSink-PHIUse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-appel-darwin -stats |& grep {machine-sink} +; RUN: llc < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats |& grep {machine-sink} define fastcc void @t() nounwind ssp { entry: diff --git a/test/CodeGen/X86/personality.ll b/test/CodeGen/X86/personality.ll index 6789bb0c0f..705e489eb4 100644 --- a/test/CodeGen/X86/personality.ll +++ b/test/CodeGen/X86/personality.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -disable-cgp-branch-opts | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i386-apple-darwin9 -disable-cgp-branch-opts | FileCheck %s -check-prefix=X32 ; PR1632 define void @_Z1fv() { diff --git a/test/CodeGen/X86/pr3366.ll b/test/CodeGen/X86/pr3366.ll index f813e2e588..1127b60932 100644 --- a/test/CodeGen/X86/pr3366.ll +++ b/test/CodeGen/X86/pr3366.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep movzbl +; RUN: llc < %s -march=x86 -disable-cgp-branch-opts | grep movzbl ; PR3366 define void @_ada_c34002a() nounwind { diff --git a/test/CodeGen/X86/sext-i1.ll b/test/CodeGen/X86/sext-i1.ll index 21c418d534..574769b430 100644 --- a/test/CodeGen/X86/sext-i1.ll +++ b/test/CodeGen/X86/sext-i1.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=64 +; RUN: llc < %s -march=x86 -disable-cgp-branch-opts | FileCheck %s -check-prefix=32 +; RUN: llc < %s -march=x86-64 -disable-cgp-branch-opts | FileCheck %s -check-prefix=64 ; rdar://7573216 ; PR6146 diff --git a/test/CodeGen/X86/zext-extract_subreg.ll b/test/CodeGen/X86/zext-extract_subreg.ll index e61e8805a2..4f1dde3c4f 100644 --- a/test/CodeGen/X86/zext-extract_subreg.ll +++ b/test/CodeGen/X86/zext-extract_subreg.ll @@ -13,6 +13,7 @@ if.end: ; preds = %if.end.i ; CHECK: %if.end ; CHECK: movl (%{{.*}}), [[REG:%[a-z]+]] ; CHECK-NOT: movl [[REG]], [[REG]] +; CHECK-NEXT: testl [[REG]], [[REG]] ; CHECK-NEXT: xorb %tmp138 = select i1 undef, i32 0, i32 %tmp7.i %tmp867 = zext i32 %tmp138 to i64 |