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| author | Andrew Trick <atrick@apple.com> | 2012-03-21 22:31:31 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-03-21 22:31:31 +0000 |
| commit | 07269265b048b4781bc446a3a35e405e9fb71b29 (patch) | |
| tree | ebcce5f7a060993af2bb1dec3b47a6d2c2c339d8 /test/CodeGen/X86 | |
| parent | 799184d8eb140d02385501223cea0a087148b67b (diff) | |
| download | llvm-07269265b048b4781bc446a3a35e405e9fb71b29.tar.gz llvm-07269265b048b4781bc446a3a35e405e9fb71b29.tar.bz2 llvm-07269265b048b4781bc446a3a35e405e9fb71b29.tar.xz | |
misched: tag a few XFAILs that I plan to fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153222 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
| -rw-r--r-- | test/CodeGen/X86/lsr-reuse.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/misched-new.ll | 25 | ||||
| -rw-r--r-- | test/CodeGen/X86/remat-scalar-zero.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/zext-sext.ll | 1 |
4 files changed, 28 insertions, 0 deletions
diff --git a/test/CodeGen/X86/lsr-reuse.ll b/test/CodeGen/X86/lsr-reuse.ll index 527a5a60e8..1311a73fd3 100644 --- a/test/CodeGen/X86/lsr-reuse.ll +++ b/test/CodeGen/X86/lsr-reuse.ll @@ -1,4 +1,5 @@ ; XFAIL: * +; ...should pass. See PR12324: misched bringup ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s target datalayout = "e-p:64:64:64" target triple = "x86_64-unknown-unknown" diff --git a/test/CodeGen/X86/misched-new.ll b/test/CodeGen/X86/misched-new.ll new file mode 100644 index 0000000000..f3c2af8f21 --- /dev/null +++ b/test/CodeGen/X86/misched-new.ll @@ -0,0 +1,25 @@ +; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s +; XFAIL: * +; ...should pass. See PR12324: misched bringup +; +; Interesting MachineScheduler cases. + +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + +; From oggenc. +; After coalescing, we have a dead superreg (RAX) definition. +; +; CHECK: xorl %esi, %esi +; CHECK: movl $32, %ecx +; CHECK: rep;movsl +define fastcc void @_preextrapolate_helper() nounwind uwtable ssp { +entry: + br i1 undef, label %for.cond.preheader, label %if.end + +for.cond.preheader: ; preds = %entry + call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* null, i64 128, i32 4, i1 false) nounwind + unreachable + +if.end: ; preds = %entry + ret void +} diff --git a/test/CodeGen/X86/remat-scalar-zero.ll b/test/CodeGen/X86/remat-scalar-zero.ll index f6f0ed10b5..75f438d26c 100644 --- a/test/CodeGen/X86/remat-scalar-zero.ll +++ b/test/CodeGen/X86/remat-scalar-zero.ll @@ -1,4 +1,5 @@ ; XFAIL: * +; ...should pass. See PR12324: misched bringup ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t ; RUN: not grep xor %t ; RUN: not grep movap %t diff --git a/test/CodeGen/X86/zext-sext.ll b/test/CodeGen/X86/zext-sext.ll index cea9e9c854..6432ae38ff 100644 --- a/test/CodeGen/X86/zext-sext.ll +++ b/test/CodeGen/X86/zext-sext.ll @@ -1,4 +1,5 @@ ; XFAIL: * +; ...should pass. See PR12324: misched bringup ; RUN: llc < %s -march=x86-64 | FileCheck %s ; <rdar://problem/8006248> |