Don't force promotion of return arguments on the callee.

Some architectures (like x86) don't require it.
This fixes bug 3779.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 27 insertions, 7 deletions

diff --git a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
index b62d2c61bb..ffb1e83a27 100644
--- a/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
+++ b/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {movsbl}
+; RUN: llvm-as < %s | llc -march=x86 | not grep {movsbl}
 
 @X = global i32 0               ; <i32*> [#uses=1]
 
diff --git a/test/CodeGen/X86/20090313-signext.ll b/test/CodeGen/X86/20090313-signext.ll
new file mode 100644
index 0000000000..d41b245486
--- /dev/null
+++ b/test/CodeGen/X86/20090313-signext.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: grep {movswl	%ax, %edi} %t
+; RUN: grep {movw	x(%rip), %ax} %t
+
+@x = common global i16 0
+
+define signext i16 @f() nounwind {
+entry:
+	%0 = tail call signext i16 @h() nounwind
+	%1 = sext i16 %0 to i32
+	tail call void @g(i32 %1) nounwind
+	%2 = load i16* @x, align 2
+	ret i16 %2
+}
+
+declare signext i16 @h()
+
+declare void @g(i32)
diff --git a/test/CodeGen/X86/const-select.ll b/test/CodeGen/X86/const-select.ll
index 6e3156beb0..8cdf4ac22d 100644
--- a/test/CodeGen/X86/const-select.ll
+++ b/test/CodeGen/X86/const-select.ll
@@ -10,7 +10,7 @@ entry:
 	ret float %iftmp.0.0
 }
 
-; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax}
+; RUN: llvm-as < %s | llc | grep {movb.*(%e.x,%e.x,4), %al}
 define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
 entry:
 	%0 = fcmp olt double %F, 4.200000e+01		; <i1> [#uses=1]
diff --git a/test/CodeGen/X86/isel-sink2.ll b/test/CodeGen/X86/isel-sink2.ll
index d8e27e9aff..9d9c747fa4 100644
--- a/test/CodeGen/X86/isel-sink2.ll
+++ b/test/CodeGen/X86/isel-sink2.ll
@@ -1,5 +1,6 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl.7(%...)}
-; RUN: llvm-as < %s | llc -march=x86 | not grep leal
+; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: grep {movb.7(%...)} %t
+; RUN: not grep leal %t
 
 define i8 @test(i32 *%P) nounwind {
   %Q = getelementptr i32* %P, i32 1
diff --git a/test/CodeGen/X86/sext-trunc.ll b/test/CodeGen/X86/sext-trunc.ll
index 97b4666827..df401564c2 100644
--- a/test/CodeGen/X86/sext-trunc.ll
+++ b/test/CodeGen/X86/sext-trunc.ll
@@ -1,5 +1,6 @@
 ; RUN: llvm-as < %s | llc -march=x86 > %t
-; RUN: grep movsbl %t
+; RUN: grep movb %t
+; RUN: not grep movsbl %t
 ; RUN: not grep movz %t
 ; RUN: not grep and %t
 
diff --git a/test/CodeGen/X86/tls11.ll b/test/CodeGen/X86/tls11.ll
index 32d0a1204c..f8543c089f 100644
--- a/test/CodeGen/X86/tls11.ll
+++ b/test/CodeGen/X86/tls11.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
-; RUN: grep {movzwl	%gs:i@NTPOFF, %eax} %t
+; RUN: grep {movw	%gs:i@NTPOFF, %ax} %t
 
 @i = thread_local global i16 15
 
diff --git a/test/CodeGen/X86/tls12.ll b/test/CodeGen/X86/tls12.ll
index c6f766d447..17ea996aa4 100644
--- a/test/CodeGen/X86/tls12.ll
+++ b/test/CodeGen/X86/tls12.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
-; RUN: grep {movzbl	%gs:i@NTPOFF, %eax} %t
+; RUN: grep {movb	%gs:i@NTPOFF, %al} %t
 
 @i = thread_local global i8 15