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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-03 22:45:21 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-03 22:45:21 +0000 |
| commit | 2e3e720d76a57bf41605518169dfc95b326112e7 (patch) | |
| tree | 7ac1272784fc37ff586e464d6afd1038a4c1b65e /test/CodeGen/X86 | |
| parent | 7b5fdc7fbd925084a3d18ff078a280b319612ce2 (diff) | |
| download | llvm-2e3e720d76a57bf41605518169dfc95b326112e7.tar.gz llvm-2e3e720d76a57bf41605518169dfc95b326112e7.tar.bz2 llvm-2e3e720d76a57bf41605518169dfc95b326112e7.tar.xz | |
Fix some tests that depend on register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132602 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
| -rw-r--r-- | test/CodeGen/X86/dbg-value-isel.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/tailcallstack64.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/widen_load-0.ll | 16 | ||||
| -rw-r--r-- | test/CodeGen/X86/win64_alloca_dynalloca.ll | 4 |
4 files changed, 12 insertions, 12 deletions
diff --git a/test/CodeGen/X86/dbg-value-isel.ll b/test/CodeGen/X86/dbg-value-isel.ll index dc19ff34ff..d1a9e571ce 100644 --- a/test/CodeGen/X86/dbg-value-isel.ll +++ b/test/CodeGen/X86/dbg-value-isel.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin10.0.0" ; PR 9879 -; CHECK: ##DEBUG_VALUE: tid <- R14D+0 +; CHECK: ##DEBUG_VALUE: tid <- %0 = type { i8*, i8*, i8*, i8*, i32 } @sgv = internal addrspace(2) constant [1 x i8] zeroinitializer diff --git a/test/CodeGen/X86/tailcallstack64.ll b/test/CodeGen/X86/tailcallstack64.ll index 060ce0f7aa..c18c7aa2d4 100644 --- a/test/CodeGen/X86/tailcallstack64.ll +++ b/test/CodeGen/X86/tailcallstack64.ll @@ -2,7 +2,7 @@ ; RUN: llc < %s -tailcallopt -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s ; FIXME: Redundant unused stack allocation could be eliminated. -; CHECK: subq ${{24|72}}, %rsp +; CHECK: subq ${{24|72|80}}, %rsp ; Check that lowered arguments on the stack do not overwrite each other. ; Add %in1 %p1 to a different temporary register (%eax). diff --git a/test/CodeGen/X86/widen_load-0.ll b/test/CodeGen/X86/widen_load-0.ll index 82c8252e7b..c91627cd27 100644 --- a/test/CodeGen/X86/widen_load-0.ll +++ b/test/CodeGen/X86/widen_load-0.ll @@ -4,15 +4,15 @@ ; Both loads should happen before either store. -; CHECK: movl (%rdi), %eax -; CHECK: movl (%rsi), %ecx -; CHECK: movl %ecx, (%rdi) -; CHECK: movl %eax, (%rsi) +; CHECK: movl (%rdi), %[[R1:...]] +; CHECK: movl (%rsi), %[[R2:...]] +; CHECK: movl %[[R2]], (%rdi) +; CHECK: movl %[[R1]], (%rsi) -; WIN64: movl (%rcx), %eax -; WIN64: movl (%rdx), %esi -; WIN64: movl %esi, (%rcx) -; WIN64: movl %eax, (%rdx) +; WIN64: movl (%rcx), %[[R1:...]] +; WIN64: movl (%rdx), %[[R2:...]] +; WIN64: movl %[[R2]], (%rcx) +; WIN64: movl %[[R1]], (%rdx) define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind { entry: diff --git a/test/CodeGen/X86/win64_alloca_dynalloca.ll b/test/CodeGen/X86/win64_alloca_dynalloca.ll index 566501cda9..e39d007b6f 100644 --- a/test/CodeGen/X86/win64_alloca_dynalloca.ll +++ b/test/CodeGen/X86/win64_alloca_dynalloca.ll @@ -43,9 +43,9 @@ entry: ; W64: subq %rax, %rsp ; W64: movq %rsp, %rax -; EFI: leaq 15(%rcx), [[R1:%r..]] +; EFI: leaq 15(%rcx), [[R1:%r.*]] ; EFI: andq $-16, [[R1]] -; EFI: movq %rsp, [[R64:%r..]] +; EFI: movq %rsp, [[R64:%r.*]] ; EFI: subq [[R1]], [[R64]] ; EFI: movq [[R64]], %rsp |