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authorElena Demikhovsky <elena.demikhovsky@intel.com>2013-11-14 11:29:27 +0000
committerElena Demikhovsky <elena.demikhovsky@intel.com>2013-11-14 11:29:27 +0000
commitf58e4144054b85e855c57c86eb058a6bb1907552 (patch)
treef294045cfb4fbfd7de30200ef29eb3203ea5decd /test/CodeGen/X86
parent4701c4702e2f37d7a9f3ea9ef91ec47d73515093 (diff)
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AVX-512: Handled extractelement from mask vector;
Added VMOSHDUP/VMOVSLDUP shuffle instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194691 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/X86')
-rw-r--r--test/CodeGen/X86/avx512-insert-extract.ll25
-rw-r--r--test/CodeGen/X86/avx512-shuffle.ll8
2 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx512-insert-extract.ll b/test/CodeGen/X86/avx512-insert-extract.ll
index 530b92e484..3f067401ed 100644
--- a/test/CodeGen/X86/avx512-insert-extract.ll
+++ b/test/CodeGen/X86/avx512-insert-extract.ll
@@ -98,3 +98,28 @@ define i32 @test10(<16 x i32> %x, i32 %ind) nounwind {
ret i32 %e
}
+;CHECK-LABEL: test11
+;CHECK: movl $260
+;CHECK: bextrl
+;CHECK: movl $268
+;CHECK: bextrl
+;CHECK: ret
+define <16 x i32> @test11(<16 x i32>%a, <16 x i32>%b) {
+ %cmp_res = icmp ult <16 x i32> %a, %b
+ %ia = extractelement <16 x i1> %cmp_res, i32 4
+ %ib = extractelement <16 x i1> %cmp_res, i32 12
+
+ br i1 %ia, label %A, label %B
+
+ A:
+ ret <16 x i32>%b
+ B:
+ %c = add <16 x i32>%b, %a
+ br i1 %ib, label %C, label %D
+ C:
+ %c1 = sub <16 x i32>%c, %a
+ ret <16 x i32>%c1
+ D:
+ %c2 = mul <16 x i32>%c, %a
+ ret <16 x i32>%c2
+}
diff --git a/test/CodeGen/X86/avx512-shuffle.ll b/test/CodeGen/X86/avx512-shuffle.ll
index f9186b643f..c9e0c2b992 100644
--- a/test/CodeGen/X86/avx512-shuffle.ll
+++ b/test/CodeGen/X86/avx512-shuffle.ll
@@ -215,4 +215,12 @@ define <16 x i32> @test24(<16 x i32> %a, <16 x i32> %b) nounwind {
define <16 x i32> @test25(<16 x i32> %a, <16 x i32> %b) nounwind {
%c = shufflevector <16 x i32> %a, <16 x i32> %b, <16 x i32> <i32 0, i32 1, i32 19, i32 undef, i32 4, i32 5, i32 23, i32 undef, i32 8, i32 9, i32 27, i32 undef, i32 12, i32 13, i32 undef, i32 undef>
ret <16 x i32> %c
+}
+
+; CHECK-LABEL: @test26
+; CHECK: vmovshdup
+; CHECK: ret
+define <16 x i32> @test26(<16 x i32> %a) nounwind {
+ %c = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 undef, i32 9, i32 9, i32 undef, i32 11, i32 13, i32 undef, i32 undef, i32 undef>
+ ret <16 x i32> %c
} \ No newline at end of file