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| author | Richard Osborne <richard@xmos.com> | 2010-03-09 16:34:25 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2010-03-09 16:34:25 +0000 |
| commit | ad4f66c76fc7537e05b6bfb71f420c614875fb48 (patch) | |
| tree | 53a6f44af18843b18baac00b3e46cbd5ba896738 /test/CodeGen/XCore | |
| parent | 78717cd804b6d47d5e3d20cae7cb92f7467a9ec8 (diff) | |
| download | llvm-ad4f66c76fc7537e05b6bfb71f420c614875fb48.tar.gz llvm-ad4f66c76fc7537e05b6bfb71f420c614875fb48.tar.bz2 llvm-ad4f66c76fc7537e05b6bfb71f420c614875fb48.tar.xz | |
In cases where the carry / borrow unused converted ladd / lsub
to an add or a sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98059 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/XCore')
| -rw-r--r-- | test/CodeGen/XCore/ladd_lsub_combine.ll | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/test/CodeGen/XCore/ladd_lsub_combine.ll b/test/CodeGen/XCore/ladd_lsub_combine.ll index ea9a3b78f2..a693ee2229 100644 --- a/test/CodeGen/XCore/ladd_lsub_combine.ll +++ b/test/CodeGen/XCore/ladd_lsub_combine.ll @@ -26,3 +26,42 @@ entry: ; CHECK-NEXT: lsub r1, r0, r1, r0, r2 ; CHECK-NEXT: neg r1, r1 ; CHECK-NEXT: retsp 0 + +; Should compile to one ladd and one add +define i64 @f3(i64 %x, i32 %y) nounwind { +entry: + %0 = zext i32 %y to i64 ; <i64> [#uses=1] + %1 = add i64 %x, %0 ; <i64> [#uses=1] + ret i64 %1 +} +; CHECK: f3: +; CHECK: ldc r3, 0 +; CHECK-NEXT: ladd r2, r0, r0, r2, r3 +; CHECK-NEXT: add r1, r1, r2 +; CHECK-NEXT: retsp 0 + +; Should compile to one ladd and one add +define i64 @f4(i32 %x, i64 %y) nounwind { +entry: + %0 = zext i32 %x to i64 ; <i64> [#uses=1] + %1 = add i64 %0, %y ; <i64> [#uses=1] + ret i64 %1 +} +; CHECK: f4: +; CHECK: ldc r3, 0 +; CHECK-NEXT: ladd r1, r0, r0, r1, r3 +; CHECK-NEXT: add r1, r2, r1 +; CHECK-NEXT: retsp 0 + +; Should compile to one lsub and one sub +define i64 @f5(i64 %x, i32 %y) nounwind { +entry: + %0 = zext i32 %y to i64 ; <i64> [#uses=1] + %1 = sub i64 %x, %0 ; <i64> [#uses=1] + ret i64 %1 +} +; CHECK: f5: +; CHECK: ldc r3, 0 +; CHECK-NEXT: lsub r2, r0, r0, r2, r3 +; CHECK-NEXT: sub r1, r1, r2 +; CHECK-NEXT: retsp 0 |