diff options
author | Evan Cheng <evan.cheng@apple.com> | 2011-12-19 23:26:44 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2011-12-19 23:26:44 +0000 |
commit | 26118cfaa03619ff12bdc5c9f848afa3d3289f9e (patch) | |
tree | 7d5e009680b565525250c5a77accc564be1fedb7 /test/CodeGen | |
parent | 2f196747f15240691bd4e622f7995edfedf90f61 (diff) | |
download | llvm-26118cfaa03619ff12bdc5c9f848afa3d3289f9e.tar.gz llvm-26118cfaa03619ff12bdc5c9f848afa3d3289f9e.tar.bz2 llvm-26118cfaa03619ff12bdc5c9f848afa3d3289f9e.tar.xz |
Move tests to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146923 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/ARM/ifcvt1.ll | 6 | ||||
-rw-r--r-- | test/CodeGen/ARM/ifcvt3.ll | 7 |
2 files changed, 10 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/ifcvt1.ll b/test/CodeGen/ARM/ifcvt1.ll index b073a05fc9..cd870bb5d4 100644 --- a/test/CodeGen/ARM/ifcvt1.ll +++ b/test/CodeGen/ARM/ifcvt1.ll @@ -1,15 +1,17 @@ -; RUN: llc < %s -march=arm -mattr=+v4t -; RUN: llc < %s -march=arm -mattr=+v4t | grep bx | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s define i32 @t1(i32 %a, i32 %b) { +; CHECK: t1: %tmp2 = icmp eq i32 %a, 0 br i1 %tmp2, label %cond_false, label %cond_true cond_true: +; CHECK: subeq r0, r1, #1 %tmp5 = add i32 %b, 1 ret i32 %tmp5 cond_false: +; CHECK: addne r0, r1, #1 %tmp7 = add i32 %b, -1 ret i32 %tmp7 } diff --git a/test/CodeGen/ARM/ifcvt3.ll b/test/CodeGen/ARM/ifcvt3.ll index 3e2c578dd0..eef4de050b 100644 --- a/test/CodeGen/ARM/ifcvt3.ll +++ b/test/CodeGen/ARM/ifcvt3.ll @@ -1,14 +1,19 @@ -; RUN: llc < %s -march=arm -mattr=+v4t +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s ; RUN: llc < %s -march=arm -mattr=+v4t | grep cmpne | count 1 ; RUN: llc < %s -march=arm -mattr=+v4t | grep bx | count 2 define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) { +; CHECK: t1: +; CHECK: cmp r2, #1 +; CHECK: cmpne r2, #7 switch i32 %c, label %cond_next [ i32 1, label %cond_true i32 7, label %cond_true ] cond_true: +; CHECK: addne r0 +; CHECK: bxne %tmp12 = add i32 %a, 1 %tmp1518 = add i32 %tmp12, %b ret i32 %tmp1518 |