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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-19 16:24:22 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-19 16:24:22 +0000
commit52b2774577e07fbf804e4d647119578df4111f21 (patch)
treea1a4f6c458b0fbbd323da189fc0bb8fcfecea4f2 /test/CodeGen
parentebd21b30eb833a6942c4e82f890989a2462ab74f (diff)
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[SystemZ] Add NGRK, OGRK and XGRK
Like r186683, but for 64 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186685 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/SystemZ/and-03.ll3
-rw-r--r--test/CodeGen/SystemZ/and-07.ll18
-rw-r--r--test/CodeGen/SystemZ/atomicrmw-and-04.ll2
-rw-r--r--test/CodeGen/SystemZ/atomicrmw-nand-04.ll2
-rw-r--r--test/CodeGen/SystemZ/atomicrmw-or-04.ll2
-rw-r--r--test/CodeGen/SystemZ/atomicrmw-xor-04.ll2
-rw-r--r--test/CodeGen/SystemZ/or-03.ll3
-rw-r--r--test/CodeGen/SystemZ/or-07.ll18
-rw-r--r--test/CodeGen/SystemZ/xor-03.ll3
-rw-r--r--test/CodeGen/SystemZ/xor-07.ll18
10 files changed, 64 insertions, 7 deletions
diff --git a/test/CodeGen/SystemZ/and-03.ll b/test/CodeGen/SystemZ/and-03.ll
index ca262cfb45..a0560d46e4 100644
--- a/test/CodeGen/SystemZ/and-03.ll
+++ b/test/CodeGen/SystemZ/and-03.ll
@@ -1,6 +1,7 @@
; Test 64-bit ANDs in which the second operand is variable.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
declare i64 @foo()
diff --git a/test/CodeGen/SystemZ/and-07.ll b/test/CodeGen/SystemZ/and-07.ll
index 2bdf97d470..ad4c4af59f 100644
--- a/test/CodeGen/SystemZ/and-07.ll
+++ b/test/CodeGen/SystemZ/and-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
%and = and i32 %a, %b
ret i32 %and
}
+
+; Check NGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: ngrk %r2, %r3, %r4
+; CHECK: br %r14
+ %and = and i64 %b, %c
+ ret i64 %and
+}
+
+; Check that we can still use NGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: ngr %r2, %r3
+; CHECK: br %r14
+ %and = and i64 %a, %b
+ ret i64 %and
+}
diff --git a/test/CodeGen/SystemZ/atomicrmw-and-04.ll b/test/CodeGen/SystemZ/atomicrmw-and-04.ll
index 6a9f81ac39..b224423c0b 100644
--- a/test/CodeGen/SystemZ/atomicrmw-and-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-and-04.ll
@@ -1,6 +1,6 @@
; Test 64-bit atomic ANDs.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Check ANDs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
diff --git a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
index 2fb919d3a3..907647106c 100644
--- a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
@@ -1,6 +1,6 @@
; Test 64-bit atomic NANDs.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Check NANDs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
diff --git a/test/CodeGen/SystemZ/atomicrmw-or-04.ll b/test/CodeGen/SystemZ/atomicrmw-or-04.ll
index de798be1c1..4782768765 100644
--- a/test/CodeGen/SystemZ/atomicrmw-or-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-or-04.ll
@@ -1,6 +1,6 @@
; Test 64-bit atomic ORs.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Check ORs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
diff --git a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
index d767b20a57..1e438bd2dc 100644
--- a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
@@ -1,6 +1,6 @@
; Test 64-bit atomic XORs.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Check XORs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
diff --git a/test/CodeGen/SystemZ/or-03.ll b/test/CodeGen/SystemZ/or-03.ll
index 3e37367368..5fdbdfd1ed 100644
--- a/test/CodeGen/SystemZ/or-03.ll
+++ b/test/CodeGen/SystemZ/or-03.ll
@@ -1,6 +1,7 @@
; Test 64-bit ORs in which the second operand is variable.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
declare i64 @foo()
diff --git a/test/CodeGen/SystemZ/or-07.ll b/test/CodeGen/SystemZ/or-07.ll
index f6848a1659..9fff88e716 100644
--- a/test/CodeGen/SystemZ/or-07.ll
+++ b/test/CodeGen/SystemZ/or-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
%or = or i32 %a, %b
ret i32 %or
}
+
+; Check OGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: ogrk %r2, %r3, %r4
+; CHECK: br %r14
+ %or = or i64 %b, %c
+ ret i64 %or
+}
+
+; Check that we can still use OGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: ogr %r2, %r3
+; CHECK: br %r14
+ %or = or i64 %a, %b
+ ret i64 %or
+}
diff --git a/test/CodeGen/SystemZ/xor-03.ll b/test/CodeGen/SystemZ/xor-03.ll
index 2cd428ae7f..ab7f2584b6 100644
--- a/test/CodeGen/SystemZ/xor-03.ll
+++ b/test/CodeGen/SystemZ/xor-03.ll
@@ -1,6 +1,7 @@
; Test 64-bit XORs in which the second operand is variable.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
declare i64 @foo()
diff --git a/test/CodeGen/SystemZ/xor-07.ll b/test/CodeGen/SystemZ/xor-07.ll
index 22deef64ce..ec2a0385b1 100644
--- a/test/CodeGen/SystemZ/xor-07.ll
+++ b/test/CodeGen/SystemZ/xor-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
%xor = xor i32 %a, %b
ret i32 %xor
}
+
+; Check XGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: xgrk %r2, %r3, %r4
+; CHECK: br %r14
+ %xor = xor i64 %b, %c
+ ret i64 %xor
+}
+
+; Check that we can still use XGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: xgr %r2, %r3
+; CHECK: br %r14
+ %xor = xor i64 %a, %b
+ ret i64 %xor
+}