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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-01-05 00:26:57 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-01-05 00:26:57 +0000
commit7255a4e1332ccb69918ebe041dff05f9e4e5815d (patch)
tree7378c1ee8ab51c78e53aeca3bde52ab3bda9a215 /test/CodeGen
parent54f3b7a9109d1916cf25ffdb2ed5045f03121b5a (diff)
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Reapply r146997, "Heed spill slot alignment on ARM."
Now that canRealignStack() understands frozen reserved registers, it is safe to use it for aligned spill instructions. It will only return true if the registers reserved at the beginning of register allocation allow for dynamic stack realignment. <rdar://problem/10625436> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147579 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/ARM/fast-isel-deadcode.ll3
-rw-r--r--test/CodeGen/Thumb2/aligned-spill.ll2
2 files changed, 2 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/fast-isel-deadcode.ll b/test/CodeGen/ARM/fast-isel-deadcode.ll
index 1d77975ee8..7e147c7b4d 100644
--- a/test/CodeGen/ARM/fast-isel-deadcode.ll
+++ b/test/CodeGen/ARM/fast-isel-deadcode.ll
@@ -15,8 +15,7 @@ entry:
; THUMB-NOT: sxtb
; THUMB: movs r0, #0
; THUMB: movt r0, #0
-; THUMB: add sp, #32
-; THUMb: pop {r7, pc}
+; THUMB: pop
ret i32 0
}
diff --git a/test/CodeGen/Thumb2/aligned-spill.ll b/test/CodeGen/Thumb2/aligned-spill.ll
index 734003273e..948c8ce2c2 100644
--- a/test/CodeGen/Thumb2/aligned-spill.ll
+++ b/test/CodeGen/Thumb2/aligned-spill.ll
@@ -1,4 +1,4 @@
-; DONT: llc < %s -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills | FileCheck %s --check-prefix=NEON
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
target triple = "thumbv7-apple-ios"