diff options
author | Benjamin Kramer <benny.kra@googlemail.com> | 2013-03-29 17:14:24 +0000 |
---|---|---|
committer | Benjamin Kramer <benny.kra@googlemail.com> | 2013-03-29 17:14:24 +0000 |
commit | 74a4533a4290b7c6f1fe04a30ca13ec25c529e0a (patch) | |
tree | 06e8cebe8401550f9efcbfbf2476b0612dd49cc3 /test/CodeGen | |
parent | 975ee54731476ff6541fc42f6a8cd706f3d33f58 (diff) | |
download | llvm-74a4533a4290b7c6f1fe04a30ca13ec25c529e0a.tar.gz llvm-74a4533a4290b7c6f1fe04a30ca13ec25c529e0a.tar.bz2 llvm-74a4533a4290b7c6f1fe04a30ca13ec25c529e0a.tar.xz |
Remove the old CodePlacementOpt pass.
It was superseded by MachineBlockPlacement and disabled by default since LLVM 3.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178349 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/ARM/commute-movcc.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/lsr-icmp-imm.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM/widen-vmovs.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/2011-09-14-valcoalesce.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/multiple-loop-post-inc.ll | 2 |
5 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/ARM/commute-movcc.ll b/test/CodeGen/ARM/commute-movcc.ll index 7316452cd6..769ba55eb9 100644 --- a/test/CodeGen/ARM/commute-movcc.ll +++ b/test/CodeGen/ARM/commute-movcc.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s -; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-block-placement < %s | FileCheck %s ; LLVM IR optimizers canonicalize icmp+select this way. ; Make sure that TwoAddressInstructionPass can commute the corresponding diff --git a/test/CodeGen/ARM/lsr-icmp-imm.ll b/test/CodeGen/ARM/lsr-icmp-imm.ll index 5283f5747d..248c4bd1be 100644 --- a/test/CodeGen/ARM/lsr-icmp-imm.ll +++ b/test/CodeGen/ARM/lsr-icmp-imm.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s -; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-block-placement < %s | FileCheck %s ; LSR should compare against the post-incremented induction variable. ; In this case, the immediate value is -2 which requires a cmn instruction. diff --git a/test/CodeGen/ARM/widen-vmovs.ll b/test/CodeGen/ARM/widen-vmovs.ll index 679e3f4347..1efbc73650 100644 --- a/test/CodeGen/ARM/widen-vmovs.ll +++ b/test/CodeGen/ARM/widen-vmovs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-code-place | FileCheck %s +; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-block-placement | FileCheck %s target triple = "thumbv7-apple-ios" ; The 1.0e+10 constant is loaded from the constant pool and kept in a register. diff --git a/test/CodeGen/X86/2011-09-14-valcoalesce.ll b/test/CodeGen/X86/2011-09-14-valcoalesce.ll index a5ec614a94..54d2b40350 100644 --- a/test/CodeGen/X86/2011-09-14-valcoalesce.ll +++ b/test/CodeGen/X86/2011-09-14-valcoalesce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-code-place | FileCheck %s +; RUN: llc < %s -march=x86 -disable-block-placement | FileCheck %s ; ; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg: ; while.body85.i: diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll index 9f7d036cf1..29b9f34464 100644 --- a/test/CodeGen/X86/multiple-loop-post-inc.ll +++ b/test/CodeGen/X86/multiple-loop-post-inc.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s +; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s ; rdar://7236213 ; ; The scheduler's 2-address hack has been disabled, so there is |