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author | Daniel Dunbar <daniel@zuster.org> | 2010-02-24 17:05:47 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2010-02-24 17:05:47 +0000 |
commit | cfe30effbb952ae5b49a01de8329e3a2c14bad75 (patch) | |
tree | 1aadf15226e7242aa2984e90448bbcb9e3a80a07 /test/CodeGen | |
parent | 6d8f2ca646bc283c31f48b6816d5194c836dfec6 (diff) | |
download | llvm-cfe30effbb952ae5b49a01de8329e3a2c14bad75.tar.gz llvm-cfe30effbb952ae5b49a01de8329e3a2c14bad75.tar.bz2 llvm-cfe30effbb952ae5b49a01de8329e3a2c14bad75.tar.xz |
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/X86/2010-02-23-DAGCombineBug.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/X86/critical-edge-split.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/ins_subreg_coalesce-3.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/trunc-to-bool.ll | 21 | ||||
-rw-r--r-- | test/CodeGen/X86/xor-icmp.ll | 31 |
5 files changed, 10 insertions, 63 deletions
diff --git a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll deleted file mode 100644 index ea3621f9f1..0000000000 --- a/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -march=x86 | FileCheck %s - -define i32* @t() nounwind optsize ssp { -entry: -; CHECK: t: -; CHECK: testl %eax, %eax -; CHECK: js - %cmp = icmp slt i32 undef, 0 ; <i1> [#uses=1] - %outsearch.0 = select i1 %cmp, i1 false, i1 true ; <i1> [#uses=1] - br i1 %outsearch.0, label %if.then27, label %if.else29 - -if.then27: ; preds = %entry - ret i32* undef - -if.else29: ; preds = %entry - unreachable -} diff --git a/test/CodeGen/X86/critical-edge-split.ll b/test/CodeGen/X86/critical-edge-split.ll index f29cbf323e..4fe554de75 100644 --- a/test/CodeGen/X86/critical-edge-split.ll +++ b/test/CodeGen/X86/critical-edge-split.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -stats -info-output-file - | grep asm-printer | grep 29 +; RUN: llc < %s -mtriple=i386-apple-darwin -tailcallopt=false -stats -info-output-file - | grep asm-printer | grep 31 %CC = type { %Register } %II = type { %"struct.XX::II::$_74" } diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll index 8c1c409766..627edc51c1 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 3 +; RUN: llc < %s -march=x86-64 | grep mov | count 5 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/test/CodeGen/X86/trunc-to-bool.ll b/test/CodeGen/X86/trunc-to-bool.ll index 6062084106..bfab1aef90 100644 --- a/test/CodeGen/X86/trunc-to-bool.ll +++ b/test/CodeGen/X86/trunc-to-bool.ll @@ -3,14 +3,13 @@ ; value and as the operand of a branch. ; RUN: llc < %s -march=x86 | FileCheck %s -define i1 @test1(i32 %X) zeroext nounwind { +define i1 @test1(i32 %X) zeroext { %Y = trunc i32 %X to i1 ret i1 %Y } -; CHECK: test1: ; CHECK: andl $1, %eax -define i1 @test2(i32 %val, i32 %mask) nounwind { +define i1 @test2(i32 %val, i32 %mask) { entry: %shifted = ashr i32 %val, %mask %anded = and i32 %shifted, 1 @@ -21,10 +20,9 @@ ret_true: ret_false: ret i1 false } -; CHECK: test2: -; CHECK: btl %eax +; CHECK: testb $1, %al -define i32 @test3(i8* %ptr) nounwind { +define i32 @test3(i8* %ptr) { %val = load i8* %ptr %tmp = trunc i8 %val to i1 br i1 %tmp, label %cond_true, label %cond_false @@ -33,10 +31,9 @@ cond_true: cond_false: ret i32 42 } -; CHECK: test3: -; CHECK: testb $1, (%eax) +; CHECK: testb $1, %al -define i32 @test4(i8* %ptr) nounwind { +define i32 @test4(i8* %ptr) { %tmp = ptrtoint i8* %ptr to i1 br i1 %tmp, label %cond_true, label %cond_false cond_true: @@ -44,10 +41,9 @@ cond_true: cond_false: ret i32 42 } -; CHECK: test4: -; CHECK: testb $1, 4(%esp) +; CHECK: testb $1, %al -define i32 @test5(double %d) nounwind { +define i32 @test6(double %d) { %tmp = fptosi double %d to i1 br i1 %tmp, label %cond_true, label %cond_false cond_true: @@ -55,5 +51,4 @@ cond_true: cond_false: ret i32 42 } -; CHECK: test5: ; CHECK: testb $1 diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll index 2d75c5d762..a6bdb13ec6 100644 --- a/test/CodeGen/X86/xor-icmp.ll +++ b/test/CodeGen/X86/xor-icmp.ll @@ -1,6 +1,5 @@ ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 -; rdar://7367229 define i32 @t(i32 %a, i32 %b) nounwind ssp { entry: @@ -35,33 +34,3 @@ bb1: ; preds = %entry declare i32 @foo(...) declare i32 @bar(...) - -define i32 @t2(i32 %x, i32 %y) nounwind ssp { -; X32: t2: -; X32: cmpl -; X32: sete -; X32: cmpl -; X32: sete -; X32-NOT: xor -; X32: je - -; X64: t2: -; X64: testl -; X64: sete -; X64: testl -; X64: sete -; X64-NOT: xor -; X64: je -entry: - %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] - %1 = icmp eq i32 %y, 0 ; <i1> [#uses=1] - %2 = xor i1 %1, %0 ; <i1> [#uses=1] - br i1 %2, label %bb, label %return - -bb: ; preds = %entry - %3 = tail call i32 (...)* @foo() nounwind ; <i32> [#uses=0] - ret i32 undef - -return: ; preds = %entry - ret i32 undef -} |