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author | Evan Cheng <evan.cheng@apple.com> | 2009-06-24 02:05:51 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-06-24 02:05:51 +0000 |
commit | ef5d070bbe55d7165fc84778ca7757c3cfeea491 (patch) | |
tree | 967eb7f7a9baa80526863139bcaaaeac3a3dcda3 /test/CodeGen | |
parent | e56f4a49b7cd62d05a41c88743eb5172b63788bc (diff) | |
download | llvm-ef5d070bbe55d7165fc84778ca7757c3cfeea491.tar.gz llvm-ef5d070bbe55d7165fc84778ca7757c3cfeea491.tar.bz2 llvm-ef5d070bbe55d7165fc84778ca7757c3cfeea491.tar.xz |
Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74053 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/X86/inline-asm-tied.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/X86/inline-asm-tied.ll b/test/CodeGen/X86/inline-asm-tied.ll new file mode 100644 index 0000000000..6df2c48415 --- /dev/null +++ b/test/CodeGen/X86/inline-asm-tied.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9 -O0 | grep {movl %edx, 4(%esp)} | count 2 +; rdar://6992609 + +target triple = "i386-apple-darwin9.0" +@llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define i64 @_OSSwapInt64(i64 %_data) nounwind { +entry: + %retval = alloca i64 ; <i64*> [#uses=2] + %_data.addr = alloca i64 ; <i64*> [#uses=4] + store i64 %_data, i64* %_data.addr + %tmp = load i64* %_data.addr ; <i64> [#uses=1] + %0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1] + store i64 %0, i64* %_data.addr + %tmp1 = load i64* %_data.addr ; <i64> [#uses=1] + store i64 %tmp1, i64* %retval + %1 = load i64* %retval ; <i64> [#uses=1] + ret i64 %1 +} |