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| author | Joey Gouly <joey.gouly@arm.com> | 2013-07-04 10:04:08 +0000 |
|---|---|---|
| committer | Joey Gouly <joey.gouly@arm.com> | 2013-07-04 10:04:08 +0000 |
| commit | 929d9ef111cc0053e245d04464c5ba9fba7727b2 (patch) | |
| tree | 8487cff1adafff6f2a983a9d1048f0afaf709b11 /test/MC/Disassembler/ARM | |
| parent | 1ab111ed01457887a8dece6fb36336aff41cc703 (diff) | |
| download | llvm-929d9ef111cc0053e245d04464c5ba9fba7727b2.tar.gz llvm-929d9ef111cc0053e245d04464c5ba9fba7727b2.tar.bz2 llvm-929d9ef111cc0053e245d04464c5ba9fba7727b2.tar.xz | |
Add a V8FP instruction 'vcvt{b,t}' to convert between half and double precision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185620 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/ARM')
| -rw-r--r-- | test/MC/Disassembler/ARM/invalid-v8fp.txt | 10 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/v8fp.txt | 25 |
2 files changed, 35 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-v8fp.txt b/test/MC/Disassembler/ARM/invalid-v8fp.txt new file mode 100644 index 0000000000..dba48d8ca2 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-v8fp.txt @@ -0,0 +1,10 @@ +# RUN: llvm-mc -disassemble -triple armv7 -show-encoding < %s | FileCheck %s + +0xe0 0x3b 0xb2 0xee +# CHECK-NOT: vcvtt.f64.f16 d3, s1 + +0x41 0x2b 0xb3 0xee +# CHECK-NOT: vcvtb.f16.f64 s4, d1 + +0x41 0x2b 0xb3 0xbe +# CHECK-NOT: vcvtblt.f16.f64 s4, d1 diff --git a/test/MC/Disassembler/ARM/v8fp.txt b/test/MC/Disassembler/ARM/v8fp.txt new file mode 100644 index 0000000000..76125dacfd --- /dev/null +++ b/test/MC/Disassembler/ARM/v8fp.txt @@ -0,0 +1,25 @@ +# RUN: llvm-mc -disassemble -triple armv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s + +0xe0 0x3b 0xb2 0xee +# CHECK: vcvtt.f64.f16 d3, s1 + +0xcc 0x2b 0xf3 0xee +# CHECK: vcvtt.f16.f64 s5, d12 + +0x60 0x3b 0xb2 0xee +# CHECK: vcvtb.f64.f16 d3, s1 + +0x41 0x2b 0xb3 0xee +# CHECK: vcvtb.f16.f64 s4, d1 + +0xe0 0x3b 0xb2 0xae +# CHECK: vcvttge.f64.f16 d3, s1 + +0xcc 0x2b 0xf3 0xce +# CHECK: vcvttgt.f16.f64 s5, d12 + +0x60 0x3b 0xb2 0x0e +# CHECK: vcvtbeq.f64.f16 d3, s1 + +0x41 0x2b 0xb3 0xbe +# CHECK: vcvtblt.f16.f64 s4, d1 |