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| author | Tim Northover <Tim.Northover@arm.com> | 2013-02-28 14:46:14 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-28 14:46:14 +0000 |
| commit | 54a1cf75d2b32cd96ec78f61af5c1bed8d81524d (patch) | |
| tree | 8c679b60ee8b3fa1b526075814f9540fae2b1d0e /test/MC/Disassembler | |
| parent | 6ff20f205b2aa126b268bcada9920f56715161be (diff) | |
| download | llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.tar.gz llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.tar.bz2 llvm-54a1cf75d2b32cd96ec78f61af5c1bed8d81524d.tar.xz | |
AArch64: remove post-encoder method from FCMP (immediate) instructions.
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/AArch64/a64-ignored-fields.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/MC/Disassembler/AArch64/a64-ignored-fields.txt b/test/MC/Disassembler/AArch64/a64-ignored-fields.txt new file mode 100644 index 0000000000..966530d36a --- /dev/null +++ b/test/MC/Disassembler/AArch64/a64-ignored-fields.txt @@ -0,0 +1,8 @@ +# RUN: llvm-mc -triple=aarch64 -disassemble -show-encoding < %s | FileCheck %s + +# The "Rm" bits are ignored, but the canonical representation has them filled +# with 0s. This is what we should produce even if the input bit-pattern had +# something else there. + +# CHECK: fcmp s31, #0.0 // encoding: [0xe8,0x23,0x20,0x1e] +0xe8 0x23 0x33 0x1e |