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author | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2013-07-30 10:12:14 +0000 |
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committer | Vladimir Medic <Vladimir.Medic@imgtec.com> | 2013-07-30 10:12:14 +0000 |
commit | b67775df0cc702cd94408200ff2d58cf83f1334a (patch) | |
tree | ff1c5874d7360f835387f75ee801346b235ab851 /test/MC/Mips/mips-fpu-instructions.s | |
parent | d6a721b14d94791458d6f4d80832d3f3b9e9cd11 (diff) | |
download | llvm-b67775df0cc702cd94408200ff2d58cf83f1334a.tar.gz llvm-b67775df0cc702cd94408200ff2d58cf83f1334a.tar.bz2 llvm-b67775df0cc702cd94408200ff2d58cf83f1334a.tar.xz |
This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187410 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips-fpu-instructions.s')
-rw-r--r-- | test/MC/Mips/mips-fpu-instructions.s | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/MC/Mips/mips-fpu-instructions.s b/test/MC/Mips/mips-fpu-instructions.s index 256ce4513b..dc52676433 100644 --- a/test/MC/Mips/mips-fpu-instructions.s +++ b/test/MC/Mips/mips-fpu-instructions.s @@ -159,6 +159,9 @@ # CHECK: mtc2 $9, $4, 5 # encoding: [0x05,0x20,0x89,0x48] # CHECK: movf $2, $1, $fcc0 # encoding: [0x01,0x10,0x20,0x00] # CHECK: movt $2, $1, $fcc0 # encoding: [0x01,0x10,0x21,0x00] +# CHECK: movt $4, $5, $fcc4 # encoding: [0x01,0x20,0xb1,0x00] +# CHECK: movf.d $f4, $f6, $fcc2 # encoding: [0x11,0x31,0x28,0x46] +# CHECK: movf.s $f4, $f6, $fcc5 # encoding: [0x11,0x31,0x14,0x46] # CHECK: luxc1 $f0, $6($5) # encoding: [0x05,0x00,0xa6,0x4c] # CHECK: suxc1 $f4, $24($5) # encoding: [0x0d,0x20,0xb8,0x4c] @@ -183,5 +186,8 @@ mtc2 $9, $4, 5 movf $2, $1, $fcc0 movt $2, $1, $fcc0 + movt $4, $5, $fcc4 + movf.d $f4, $f6, $fcc2 + movf.s $f4, $f6, $fcc5 luxc1 $f0, $a2($a1) suxc1 $f4, $t8($a1)
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