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| author | Jack Carter <jcarter@mips.com> | 2013-02-05 08:32:10 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-02-05 08:32:10 +0000 |
| commit | 37ef65b9c1b93c386d13089d9ace6a1cc00e82dc (patch) | |
| tree | 501b123477e6d45315c8a357cb5479d168add611 /test/MC/Mips | |
| parent | a33e1fafac7fedb1b080ef07ddf9ad6ddff3a830 (diff) | |
| download | llvm-37ef65b9c1b93c386d13089d9ace6a1cc00e82dc.tar.gz llvm-37ef65b9c1b93c386d13089d9ace6a1cc00e82dc.tar.bz2 llvm-37ef65b9c1b93c386d13089d9ace6a1cc00e82dc.tar.xz | |
This patch that sets the EmitAlias flag in td files
and enables the instruction printer to print aliased
instructions.
Due to usage of RegisterOperands a change in common
code (utils/TableGen/AsmWriterEmitter.cpp) is required
to get the correct register value if it is a RegisterOperand.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips')
| -rw-r--r-- | test/MC/Mips/mips-alu-instructions.s | 8 | ||||
| -rw-r--r-- | test/MC/Mips/mips64-alu-instructions.s | 12 |
2 files changed, 10 insertions, 10 deletions
diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s index 52fd900091..816138ec65 100644 --- a/test/MC/Mips/mips-alu-instructions.s +++ b/test/MC/Mips/mips-alu-instructions.s @@ -31,7 +31,7 @@ # CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38] # CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38] # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c] -# CHECK: nor $7, $8, $zero # encoding: [0x27,0x38,0x00,0x01] +# CHECK: not $7, $8 # encoding: [0x27,0x38,0x00,0x01] and $9, $6, $7 and $9, $6, 17767 andi $9, $6, 17767 @@ -78,9 +78,9 @@ # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00] # CHECK: sub $9, $6, $7 # encoding: [0x22,0x48,0xc7,0x00] # CHECK: subu $4, $3, $5 # encoding: [0x23,0x20,0x65,0x00] -# CHECK: sub $6, $zero, $7 # encoding: [0x22,0x30,0x07,0x00] -# CHECK: subu $6, $zero, $7 # encoding: [0x23,0x30,0x07,0x00] -# CHECK: addu $7, $8, $zero # encoding: [0x21,0x38,0x00,0x01] +# CHECK: neg $6, $7 # encoding: [0x22,0x30,0x07,0x00] +# CHECK: negu $6, $7 # encoding: [0x23,0x30,0x07,0x00] +# CHECK: move $7, $8 # encoding: [0x21,0x38,0x00,0x01] # CHECK: .set push # CHECK: .set mips32r2 # CHECK: rdhwr $5, $29 diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s index d30ddeee71..1b4ebdfbbd 100644 --- a/test/MC/Mips/mips64-alu-instructions.s +++ b/test/MC/Mips/mips64-alu-instructions.s @@ -31,7 +31,7 @@ # CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38] # CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38] # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c] -# CHECK: nor $7, $8, $zero # encoding: [0x27,0x38,0x00,0x01] +# CHECK: not $7, $8 # encoding: [0x27,0x38,0x00,0x01] and $9, $6, $7 and $9, $6, 17767 andi $9, $6, 17767 @@ -76,11 +76,11 @@ # CHECK: msubu $6, $7 # encoding: [0x05,0x00,0xc7,0x70] # CHECK: mult $3, $5 # encoding: [0x18,0x00,0x65,0x00] # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00] -# CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00] -# CHECK: daddu $7, $8, $zero # encoding: [0x2d,0x38,0x00,0x01] -# CHECK: .set push -# CHECK: .set mips32r2 -# CHECK: rdhwr $5, $29 +# CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00] +# CHECK: move $7, $8 # encoding: [0x2d,0x38,0x00,0x01] +# CHECK: .set push +# CHECK: .set mips32r2 +# CHECK: rdhwr $5, $29 # CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c] dadd $9,$6,$7 |