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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-05-03 19:49:39 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-05-03 19:49:39 +0000
commit5e220753ff81ac5cbee874e7c00c76c7fbe0d20a (patch)
treed88d5e639841ab47d78e3fb9b0af0f75417723ae /test/MC
parent968d689ec30a0df63d252b8193664e01944edb8b (diff)
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[PowerPC] Add assembler parser
This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-*-* and powerpc64-*-* triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r--test/MC/PowerPC/ppc64-encoding-fp.s263
-rw-r--r--test/MC/PowerPC/ppc64-encoding-vmx.s384
-rw-r--r--test/MC/PowerPC/ppc64-encoding.s480
-rw-r--r--test/MC/PowerPC/ppc64-errors.s80
-rw-r--r--test/MC/PowerPC/ppc64-operands.s87
5 files changed, 1294 insertions, 0 deletions
diff --git a/test/MC/PowerPC/ppc64-encoding-fp.s b/test/MC/PowerPC/ppc64-encoding-fp.s
new file mode 100644
index 0000000000..ae0e2866a2
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-encoding-fp.s
@@ -0,0 +1,263 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Floating-point facility
+
+# Floating-point load instructions
+
+# CHECK: lfs 2, 128(4) # encoding: [0xc0,0x44,0x00,0x80]
+ lfs 2, 128(4)
+# CHECK: lfsx 2, 3, 4 # encoding: [0x7c,0x43,0x24,0x2e]
+ lfsx 2, 3, 4
+# CHECK: lfsu 2, 128(4) # encoding: [0xc4,0x44,0x00,0x80]
+ lfsu 2, 128(4)
+# CHECK: lfsux 2, 3, 4 # encoding: [0x7c,0x43,0x24,0x6e]
+ lfsux 2, 3, 4
+# CHECK: lfd 2, 128(4) # encoding: [0xc8,0x44,0x00,0x80]
+ lfd 2, 128(4)
+# CHECK: lfdx 2, 3, 4 # encoding: [0x7c,0x43,0x24,0xae]
+ lfdx 2, 3, 4
+# CHECK: lfdu 2, 128(4) # encoding: [0xcc,0x44,0x00,0x80]
+ lfdu 2, 128(4)
+# CHECK: lfdux 2, 3, 4 # encoding: [0x7c,0x43,0x24,0xee]
+ lfdux 2, 3, 4
+# CHECK: lfiwax 2, 3, 4 # encoding: [0x7c,0x43,0x26,0xae]
+ lfiwax 2, 3, 4
+# CHECK: lfiwzx 2, 3, 4 # encoding: [0x7c,0x43,0x26,0xee]
+ lfiwzx 2, 3, 4
+
+# Floating-point store instructions
+
+# CHECK: stfs 2, 128(4) # encoding: [0xd0,0x44,0x00,0x80]
+ stfs 2, 128(4)
+# CHECK: stfsx 2, 3, 4 # encoding: [0x7c,0x43,0x25,0x2e]
+ stfsx 2, 3, 4
+# CHECK: stfsu 2, 128(4) # encoding: [0xd4,0x44,0x00,0x80]
+ stfsu 2, 128(4)
+# CHECK: stfsux 2, 3, 4 # encoding: [0x7c,0x43,0x25,0x6e]
+ stfsux 2, 3, 4
+# CHECK: stfd 2, 128(4) # encoding: [0xd8,0x44,0x00,0x80]
+ stfd 2, 128(4)
+# CHECK: stfdx 2, 3, 4 # encoding: [0x7c,0x43,0x25,0xae]
+ stfdx 2, 3, 4
+# CHECK: stfdu 2, 128(4) # encoding: [0xdc,0x44,0x00,0x80]
+ stfdu 2, 128(4)
+# CHECK: stfdux 2, 3, 4 # encoding: [0x7c,0x43,0x25,0xee]
+ stfdux 2, 3, 4
+# CHECK: stfiwx 2, 3, 4 # encoding: [0x7c,0x43,0x27,0xae]
+ stfiwx 2, 3, 4
+
+# Floating-point move instructions
+
+# CHECK: fmr 2, 3 # encoding: [0xfc,0x40,0x18,0x90]
+ fmr 2, 3
+# CHECK: fmr. 2, 3 # encoding: [0xfc,0x40,0x18,0x91]
+ fmr. 2, 3
+# CHECK: fneg 2, 3 # encoding: [0xfc,0x40,0x18,0x50]
+ fneg 2, 3
+# CHECK: fneg. 2, 3 # encoding: [0xfc,0x40,0x18,0x51]
+ fneg. 2, 3
+# CHECK: fabs 2, 3 # encoding: [0xfc,0x40,0x1a,0x10]
+ fabs 2, 3
+# CHECK: fabs. 2, 3 # encoding: [0xfc,0x40,0x1a,0x11]
+ fabs. 2, 3
+# CHECK: fnabs 2, 3 # encoding: [0xfc,0x40,0x19,0x10]
+ fnabs 2, 3
+# CHECK: fnabs. 2, 3 # encoding: [0xfc,0x40,0x19,0x11]
+ fnabs. 2, 3
+# FIXME: fcpsgn 2, 3
+# FIXME: fcpsgn. 2, 3
+
+# Floating-point arithmetic instructions
+
+# CHECK: fadd 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2a]
+ fadd 2, 3, 4
+# CHECK: fadd. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2b]
+ fadd. 2, 3, 4
+# CHECK: fadds 2, 3, 4 # encoding: [0xec,0x43,0x20,0x2a]
+ fadds 2, 3, 4
+# CHECK: fadds. 2, 3, 4 # encoding: [0xec,0x43,0x20,0x2b]
+ fadds. 2, 3, 4
+# CHECK: fsub 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x28]
+ fsub 2, 3, 4
+# CHECK: fsub. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x29]
+ fsub. 2, 3, 4
+# CHECK: fsubs 2, 3, 4 # encoding: [0xec,0x43,0x20,0x28]
+ fsubs 2, 3, 4
+# CHECK: fsubs. 2, 3, 4 # encoding: [0xec,0x43,0x20,0x29]
+ fsubs. 2, 3, 4
+
+# CHECK: fmul 2, 3, 4 # encoding: [0xfc,0x43,0x01,0x32]
+ fmul 2, 3, 4
+# CHECK: fmul. 2, 3, 4 # encoding: [0xfc,0x43,0x01,0x33]
+ fmul. 2, 3, 4
+# CHECK: fmuls 2, 3, 4 # encoding: [0xec,0x43,0x01,0x32]
+ fmuls 2, 3, 4
+# CHECK: fmuls. 2, 3, 4 # encoding: [0xec,0x43,0x01,0x33]
+ fmuls. 2, 3, 4
+# CHECK: fdiv 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x24]
+ fdiv 2, 3, 4
+# CHECK: fdiv. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x25]
+ fdiv. 2, 3, 4
+# CHECK: fdivs 2, 3, 4 # encoding: [0xec,0x43,0x20,0x24]
+ fdivs 2, 3, 4
+# CHECK: fdivs. 2, 3, 4 # encoding: [0xec,0x43,0x20,0x25]
+ fdivs. 2, 3, 4
+# CHECK: fsqrt 2, 3 # encoding: [0xfc,0x40,0x18,0x2c]
+ fsqrt 2, 3
+# CHECK: fsqrt. 2, 3 # encoding: [0xfc,0x40,0x18,0x2d]
+ fsqrt. 2, 3
+# CHECK: fsqrts 2, 3 # encoding: [0xec,0x40,0x18,0x2c]
+ fsqrts 2, 3
+# CHECK: fsqrts. 2, 3 # encoding: [0xec,0x40,0x18,0x2d]
+ fsqrts. 2, 3
+
+# CHECK: fre 2, 3 # encoding: [0xfc,0x40,0x18,0x30]
+ fre 2, 3
+# CHECK: fre. 2, 3 # encoding: [0xfc,0x40,0x18,0x31]
+ fre. 2, 3
+# CHECK: fres 2, 3 # encoding: [0xec,0x40,0x18,0x30]
+ fres 2, 3
+# CHECK: fres. 2, 3 # encoding: [0xec,0x40,0x18,0x31]
+ fres. 2, 3
+# CHECK: frsqrte 2, 3 # encoding: [0xfc,0x40,0x18,0x34]
+ frsqrte 2, 3
+# CHECK: frsqrte. 2, 3 # encoding: [0xfc,0x40,0x18,0x35]
+ frsqrte. 2, 3
+# CHECK: frsqrtes 2, 3 # encoding: [0xec,0x40,0x18,0x34]
+ frsqrtes 2, 3
+# CHECK: frsqrtes. 2, 3 # encoding: [0xec,0x40,0x18,0x35]
+ frsqrtes. 2, 3
+# FIXME: ftdiv 2, 3, 4
+# FIXME: ftsqrt 2, 3, 4
+
+# CHECK: fmadd 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3a]
+ fmadd 2, 3, 4, 5
+# CHECK: fmadd. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3b]
+ fmadd. 2, 3, 4, 5
+# CHECK: fmadds 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3a]
+ fmadds 2, 3, 4, 5
+# CHECK: fmadds. 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3b]
+ fmadds. 2, 3, 4, 5
+# CHECK: fmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x38]
+ fmsub 2, 3, 4, 5
+# CHECK: fmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x39]
+ fmsub. 2, 3, 4, 5
+# CHECK: fmsubs 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x38]
+ fmsubs 2, 3, 4, 5
+# CHECK: fmsubs. 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x39]
+ fmsubs. 2, 3, 4, 5
+# CHECK: fnmadd 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3e]
+ fnmadd 2, 3, 4, 5
+# CHECK: fnmadd. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3f]
+ fnmadd. 2, 3, 4, 5
+# CHECK: fnmadds 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3e]
+ fnmadds 2, 3, 4, 5
+# CHECK: fnmadds. 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3f]
+ fnmadds. 2, 3, 4, 5
+# CHECK: fnmsub 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3c]
+ fnmsub 2, 3, 4, 5
+# CHECK: fnmsub. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x3d]
+ fnmsub. 2, 3, 4, 5
+# CHECK: fnmsubs 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3c]
+ fnmsubs 2, 3, 4, 5
+# CHECK: fnmsubs. 2, 3, 4, 5 # encoding: [0xec,0x43,0x29,0x3d]
+ fnmsubs. 2, 3, 4, 5
+
+# Floating-point rounding and conversion instructions
+
+# CHECK: frsp 2, 3 # encoding: [0xfc,0x40,0x18,0x18]
+ frsp 2, 3
+# CHECK: frsp. 2, 3 # encoding: [0xfc,0x40,0x18,0x19]
+ frsp. 2, 3
+
+# FIXME: fctid 2, 3
+# FIXME: fctid. 2, 3
+# CHECK: fctidz 2, 3 # encoding: [0xfc,0x40,0x1e,0x5e]
+ fctidz 2, 3
+# CHECK: fctidz. 2, 3 # encoding: [0xfc,0x40,0x1e,0x5f]
+ fctidz. 2, 3
+# FIXME: fctidu 2, 3
+# FIXME: fctidu. 2, 3
+# CHECK: fctiduz 2, 3 # encoding: [0xfc,0x40,0x1f,0x5e]
+ fctiduz 2, 3
+# CHECK: fctiduz. 2, 3 # encoding: [0xfc,0x40,0x1f,0x5f]
+ fctiduz. 2, 3
+# FIXME: fctiw 2, 3
+# FIXME: fctiw. 2, 3
+# CHECK: fctiwz 2, 3 # encoding: [0xfc,0x40,0x18,0x1e]
+ fctiwz 2, 3
+# CHECK: fctiwz. 2, 3 # encoding: [0xfc,0x40,0x18,0x1f]
+ fctiwz. 2, 3
+# FIXME: fctiwu 2, 3
+# FIXME: fctiwu. 2, 3
+# CHECK: fctiwuz 2, 3 # encoding: [0xfc,0x40,0x19,0x1e]
+ fctiwuz 2, 3
+# CHECK: fctiwuz. 2, 3 # encoding: [0xfc,0x40,0x19,0x1f]
+ fctiwuz. 2, 3
+# CHECK: fcfid 2, 3 # encoding: [0xfc,0x40,0x1e,0x9c]
+ fcfid 2, 3
+# CHECK: fcfid. 2, 3 # encoding: [0xfc,0x40,0x1e,0x9d]
+ fcfid. 2, 3
+# CHECK: fcfidu 2, 3 # encoding: [0xfc,0x40,0x1f,0x9c]
+ fcfidu 2, 3
+# CHECK: fcfidu. 2, 3 # encoding: [0xfc,0x40,0x1f,0x9d]
+ fcfidu. 2, 3
+# CHECK: fcfids 2, 3 # encoding: [0xec,0x40,0x1e,0x9c]
+ fcfids 2, 3
+# CHECK: fcfids. 2, 3 # encoding: [0xec,0x40,0x1e,0x9d]
+ fcfids. 2, 3
+# CHECK: fcfidus 2, 3 # encoding: [0xec,0x40,0x1f,0x9c]
+ fcfidus 2, 3
+# CHECK: fcfidus. 2, 3 # encoding: [0xec,0x40,0x1f,0x9d]
+ fcfidus. 2, 3
+# CHECK: frin 2, 3 # encoding: [0xfc,0x40,0x1b,0x10]
+ frin 2, 3
+# CHECK: frin. 2, 3 # encoding: [0xfc,0x40,0x1b,0x11]
+ frin. 2, 3
+# CHECK: frip 2, 3 # encoding: [0xfc,0x40,0x1b,0x90]
+ frip 2, 3
+# CHECK: frip. 2, 3 # encoding: [0xfc,0x40,0x1b,0x91]
+ frip. 2, 3
+# CHECK: friz 2, 3 # encoding: [0xfc,0x40,0x1b,0x50]
+ friz 2, 3
+# CHECK: friz. 2, 3 # encoding: [0xfc,0x40,0x1b,0x51]
+ friz. 2, 3
+# CHECK: frim 2, 3 # encoding: [0xfc,0x40,0x1b,0xd0]
+ frim 2, 3
+# CHECK: frim. 2, 3 # encoding: [0xfc,0x40,0x1b,0xd1]
+ frim. 2, 3
+
+# Floating-point compare instructions
+
+# CHECK: fcmpu 2, 3, 4 # encoding: [0xfd,0x03,0x20,0x00]
+ fcmpu 2, 3, 4
+# FIXME: fcmpo 2, 3, 4
+
+# Floating-point select instruction
+
+# CHECK: fsel 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2e]
+ fsel 2, 3, 4, 5
+# CHECK: fsel. 2, 3, 4, 5 # encoding: [0xfc,0x43,0x29,0x2f]
+ fsel. 2, 3, 4, 5
+
+# Floating-point status and control register instructions
+
+# CHECK: mffs 2 # encoding: [0xfc,0x40,0x04,0x8e]
+ mffs 2
+# FIXME: mffs. 2
+
+# FIXME: mcrfs 2, 3
+
+# FIXME: mtfsfi 2, 3, 1
+# FIXME: mtfsfi. 2, 3, 1
+# FIXME: mtfsf 2, 3, 1, 1
+# FIXME: mtfsf. 2, 3, 1, 1
+
+# CHECK: mtfsb0 31 # encoding: [0xff,0xe0,0x00,0x8c]
+ mtfsb0 31
+# FIXME: mtfsb0. 31
+# CHECK: mtfsb1 31 # encoding: [0xff,0xe0,0x00,0x4c]
+ mtfsb1 31
+# FIXME: mtfsb1. 31
+
diff --git a/test/MC/PowerPC/ppc64-encoding-vmx.s b/test/MC/PowerPC/ppc64-encoding-vmx.s
new file mode 100644
index 0000000000..0154076390
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-encoding-vmx.s
@@ -0,0 +1,384 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Vector facility
+
+# Vector storage access instructions
+
+# CHECK: lvebx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x0e]
+ lvebx 2, 3, 4
+# CHECK: lvehx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x4e]
+ lvehx 2, 3, 4
+# CHECK: lvewx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x8e]
+ lvewx 2, 3, 4
+# CHECK: lvx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xce]
+ lvx 2, 3, 4
+# CHECK: lvxl 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xce]
+ lvxl 2, 3, 4
+# CHECK: stvebx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x0e]
+ stvebx 2, 3, 4
+# CHECK: stvehx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x4e]
+ stvehx 2, 3, 4
+# CHECK: stvewx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x8e]
+ stvewx 2, 3, 4
+# CHECK: stvx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xce]
+ stvx 2, 3, 4
+# CHECK: stvxl 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xce]
+ stvxl 2, 3, 4
+# CHECK: lvsl 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x0c]
+ lvsl 2, 3, 4
+# CHECK: lvsr 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x4c]
+ lvsr 2, 3, 4
+
+# Vector permute and formatting instructions
+
+# CHECK: vpkpx 2, 3, 4 # encoding: [0x10,0x43,0x23,0x0e]
+ vpkpx 2, 3, 4
+# CHECK: vpkshss 2, 3, 4 # encoding: [0x10,0x43,0x21,0x8e]
+ vpkshss 2, 3, 4
+# CHECK: vpkshus 2, 3, 4 # encoding: [0x10,0x43,0x21,0x0e]
+ vpkshus 2, 3, 4
+# CHECK: vpkswss 2, 3, 4 # encoding: [0x10,0x43,0x21,0xce]
+ vpkswss 2, 3, 4
+# CHECK: vpkswus 2, 3, 4 # encoding: [0x10,0x43,0x21,0x4e]
+ vpkswus 2, 3, 4
+# CHECK: vpkuhum 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0e]
+ vpkuhum 2, 3, 4
+# CHECK: vpkuhus 2, 3, 4 # encoding: [0x10,0x43,0x20,0x8e]
+ vpkuhus 2, 3, 4
+# CHECK: vpkuwum 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4e]
+ vpkuwum 2, 3, 4
+# CHECK: vpkuwus 2, 3, 4 # encoding: [0x10,0x43,0x20,0xce]
+ vpkuwus 2, 3, 4
+
+# CHECK: vupkhpx 2, 3 # encoding: [0x10,0x40,0x1b,0x4e]
+ vupkhpx 2, 3
+# CHECK: vupkhsb 2, 3 # encoding: [0x10,0x40,0x1a,0x0e]
+ vupkhsb 2, 3
+# CHECK: vupkhsh 2, 3 # encoding: [0x10,0x40,0x1a,0x4e]
+ vupkhsh 2, 3
+# CHECK: vupklpx 2, 3 # encoding: [0x10,0x40,0x1b,0xce]
+ vupklpx 2, 3
+# CHECK: vupklsb 2, 3 # encoding: [0x10,0x40,0x1a,0x8e]
+ vupklsb 2, 3
+# CHECK: vupklsh 2, 3 # encoding: [0x10,0x40,0x1a,0xce]
+ vupklsh 2, 3
+
+# CHECK: vmrghb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0c]
+ vmrghb 2, 3, 4
+# CHECK: vmrghh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4c]
+ vmrghh 2, 3, 4
+# CHECK: vmrghw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x8c]
+ vmrghw 2, 3, 4
+# CHECK: vmrglb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x0c]
+ vmrglb 2, 3, 4
+# CHECK: vmrglh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x4c]
+ vmrglh 2, 3, 4
+# CHECK: vmrglw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x8c]
+ vmrglw 2, 3, 4
+
+# CHECK: vspltb 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x0c]
+ vspltb 2, 3, 1
+# CHECK: vsplth 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x4c]
+ vsplth 2, 3, 1
+# CHECK: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c]
+ vspltw 2, 3, 1
+# CHECK: vspltisb 2, 3 # encoding: [0x10,0x43,0x03,0x0c]
+ vspltisb 2, 3
+# CHECK: vspltish 2, 3 # encoding: [0x10,0x43,0x03,0x4c]
+ vspltish 2, 3
+# CHECK: vspltisw 2, 3 # encoding: [0x10,0x43,0x03,0x8c]
+ vspltisw 2, 3
+
+# CHECK: vperm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6b]
+ vperm 2, 3, 4, 5
+# CHECK: vsel 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6a]
+ vsel 2, 3, 4, 5
+
+# CHECK: vsl 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc4]
+ vsl 2, 3, 4
+# CHECK: vsldoi 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6c]
+ vsldoi 2, 3, 4, 5
+# CHECK: vslo 2, 3, 4 # encoding: [0x10,0x43,0x24,0x0c]
+ vslo 2, 3, 4
+# CHECK: vsr 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc4]
+ vsr 2, 3, 4
+# CHECK: vsro 2, 3, 4 # encoding: [0x10,0x43,0x24,0x4c]
+ vsro 2, 3, 4
+
+# Vector integer arithmetic instructions
+
+# CHECK: vaddcuw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x80]
+ vaddcuw 2, 3, 4
+# CHECK: vaddsbs 2, 3, 4 # encoding: [0x10,0x43,0x23,0x00]
+ vaddsbs 2, 3, 4
+# CHECK: vaddshs 2, 3, 4 # encoding: [0x10,0x43,0x23,0x40]
+ vaddshs 2, 3, 4
+# CHECK: vaddsws 2, 3, 4 # encoding: [0x10,0x43,0x23,0x80]
+ vaddsws 2, 3, 4
+# CHECK: vaddubm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x00]
+ vaddubm 2, 3, 4
+# CHECK: vadduhm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x40]
+ vadduhm 2, 3, 4
+# CHECK: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80]
+ vadduwm 2, 3, 4
+# CHECK: vaddubs 2, 3, 4 # encoding: [0x10,0x43,0x22,0x00]
+ vaddubs 2, 3, 4
+# CHECK: vadduhs 2, 3, 4 # encoding: [0x10,0x43,0x22,0x40]
+ vadduhs 2, 3, 4
+# CHECK: vadduws 2, 3, 4 # encoding: [0x10,0x43,0x22,0x80]
+ vadduws 2, 3, 4
+
+# CHECK: vsubcuw 2, 3, 4 # encoding: [0x10,0x43,0x25,0x80]
+ vsubcuw 2, 3, 4
+# CHECK: vsubsbs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x00]
+ vsubsbs 2, 3, 4
+# CHECK: vsubshs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x40]
+ vsubshs 2, 3, 4
+# CHECK: vsubsws 2, 3, 4 # encoding: [0x10,0x43,0x27,0x80]
+ vsubsws 2, 3, 4
+# CHECK: vsububm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x00]
+ vsububm 2, 3, 4
+# CHECK: vsubuhm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x40]
+ vsubuhm 2, 3, 4
+# CHECK: vsubuwm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x80]
+ vsubuwm 2, 3, 4
+# CHECK: vsububs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x00]
+ vsububs 2, 3, 4
+# CHECK: vsubuhs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x40]
+ vsubuhs 2, 3, 4
+# CHECK: vsubuws 2, 3, 4 # encoding: [0x10,0x43,0x26,0x80]
+ vsubuws 2, 3, 4
+
+# CHECK: vmulesb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x08]
+ vmulesb 2, 3, 4
+# CHECK: vmulesh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x48]
+ vmulesh 2, 3, 4
+# CHECK: vmuleub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x08]
+ vmuleub 2, 3, 4
+# CHECK: vmuleuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x48]
+ vmuleuh 2, 3, 4
+# CHECK: vmulosb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x08]
+ vmulosb 2, 3, 4
+# CHECK: vmulosh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x48]
+ vmulosh 2, 3, 4
+# CHECK: vmuloub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x08]
+ vmuloub 2, 3, 4
+# CHECK: vmulouh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x48]
+ vmulouh 2, 3, 4
+
+# CHECK: vmhaddshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x60]
+ vmhaddshs 2, 3, 4, 5
+# CHECK: vmhraddshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x61]
+ vmhraddshs 2, 3, 4, 5
+# CHECK: vmladduhm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x62]
+ vmladduhm 2, 3, 4, 5
+# CHECK: vmsumubm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x64]
+ vmsumubm 2, 3, 4, 5
+# CHECK: vmsummbm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x65]
+ vmsummbm 2, 3, 4, 5
+# CHECK: vmsumshm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x68]
+ vmsumshm 2, 3, 4, 5
+# CHECK: vmsumshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x69]
+ vmsumshs 2, 3, 4, 5
+# CHECK: vmsumuhm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x66]
+ vmsumuhm 2, 3, 4, 5
+# CHECK: vmsumuhs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x67]
+ vmsumuhs 2, 3, 4, 5
+
+# CHECK: vsumsws 2, 3, 4 # encoding: [0x10,0x43,0x27,0x88]
+ vsumsws 2, 3, 4
+# CHECK: vsum2sws 2, 3, 4 # encoding: [0x10,0x43,0x26,0x88]
+ vsum2sws 2, 3, 4
+# CHECK: vsum4sbs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x08]
+ vsum4sbs 2, 3, 4
+# CHECK: vsum4shs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x48]
+ vsum4shs 2, 3, 4
+# CHECK: vsum4ubs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x08]
+ vsum4ubs 2, 3, 4
+
+# CHECK: vavgsb 2, 3, 4 # encoding: [0x10,0x43,0x25,0x02]
+ vavgsb 2, 3, 4
+# CHECK: vavgsh 2, 3, 4 # encoding: [0x10,0x43,0x25,0x42]
+ vavgsh 2, 3, 4
+# CHECK: vavgsw 2, 3, 4 # encoding: [0x10,0x43,0x25,0x82]
+ vavgsw 2, 3, 4
+# CHECK: vavgub 2, 3, 4 # encoding: [0x10,0x43,0x24,0x02]
+ vavgub 2, 3, 4
+# CHECK: vavguh 2, 3, 4 # encoding: [0x10,0x43,0x24,0x42]
+ vavguh 2, 3, 4
+# CHECK: vavguw 2, 3, 4 # encoding: [0x10,0x43,0x24,0x82]
+ vavguw 2, 3, 4
+
+# CHECK: vmaxsb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x02]
+ vmaxsb 2, 3, 4
+# CHECK: vmaxsh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x42]
+ vmaxsh 2, 3, 4
+# CHECK: vmaxsw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x82]
+ vmaxsw 2, 3, 4
+# CHECK: vmaxub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x02]
+ vmaxub 2, 3, 4
+# CHECK: vmaxuh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x42]
+ vmaxuh 2, 3, 4
+# CHECK: vmaxuw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x82]
+ vmaxuw 2, 3, 4
+
+# CHECK: vminsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x02]
+ vminsb 2, 3, 4
+# CHECK: vminsh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x42]
+ vminsh 2, 3, 4
+# CHECK: vminsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x82]
+ vminsw 2, 3, 4
+# CHECK: vminub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x02]
+ vminub 2, 3, 4
+# CHECK: vminuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x42]
+ vminuh 2, 3, 4
+# CHECK: vminuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x82]
+ vminuw 2, 3, 4
+
+# Vector integer compare instructions
+
+# CHECK: vcmpequb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x06]
+ vcmpequb 2, 3, 4
+# CHECK: vcmpequb. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x06]
+ vcmpequb. 2, 3, 4
+# CHECK: vcmpequh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x46]
+ vcmpequh 2, 3, 4
+# CHECK: vcmpequh. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x46]
+ vcmpequh. 2, 3, 4
+# CHECK: vcmpequw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x86]
+ vcmpequw 2, 3, 4
+# CHECK: vcmpequw. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x86]
+ vcmpequw. 2, 3, 4
+# CHECK: vcmpgtsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x06]
+ vcmpgtsb 2, 3, 4
+# CHECK: vcmpgtsb. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x06]
+ vcmpgtsb. 2, 3, 4
+# CHECK: vcmpgtsh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x46]
+ vcmpgtsh 2, 3, 4
+# CHECK: vcmpgtsh. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x46]
+ vcmpgtsh. 2, 3, 4
+# CHECK: vcmpgtsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x86]
+ vcmpgtsw 2, 3, 4
+# CHECK: vcmpgtsw. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x86]
+ vcmpgtsw. 2, 3, 4
+# CHECK: vcmpgtub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x06]
+ vcmpgtub 2, 3, 4
+# CHECK: vcmpgtub. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x06]
+ vcmpgtub. 2, 3, 4
+# CHECK: vcmpgtuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x46]
+ vcmpgtuh 2, 3, 4
+# CHECK: vcmpgtuh. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x46]
+ vcmpgtuh. 2, 3, 4
+# CHECK: vcmpgtuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x86]
+ vcmpgtuw 2, 3, 4
+# CHECK: vcmpgtuw. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x86]
+ vcmpgtuw. 2, 3, 4
+
+# Vector integer logical instructions
+
+# CHECK: vand 2, 3, 4 # encoding: [0x10,0x43,0x24,0x04]
+ vand 2, 3, 4
+# CHECK: vandc 2, 3, 4 # encoding: [0x10,0x43,0x24,0x44]
+ vandc 2, 3, 4
+# CHECK: vnor 2, 3, 4 # encoding: [0x10,0x43,0x25,0x04]
+ vnor 2, 3, 4
+# CHECK: vor 2, 3, 4 # encoding: [0x10,0x43,0x24,0x84]
+ vor 2, 3, 4
+# CHECK: vxor 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc4]
+ vxor 2, 3, 4
+
+# Vector integer rotate and shift instructions
+
+# CHECK: vrlb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x04]
+ vrlb 2, 3, 4
+# CHECK: vrlh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x44]
+ vrlh 2, 3, 4
+# CHECK: vrlw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x84]
+ vrlw 2, 3, 4
+
+# CHECK: vslb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x04]
+ vslb 2, 3, 4
+# CHECK: vslh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x44]
+ vslh 2, 3, 4
+# CHECK: vslw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x84]
+ vslw 2, 3, 4
+# CHECK: vsrb 2, 3, 4 # encoding: [0x10,0x43,0x22,0x04]
+ vsrb 2, 3, 4
+# CHECK: vsrh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x44]
+ vsrh 2, 3, 4
+# CHECK: vsrw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x84]
+ vsrw 2, 3, 4
+# CHECK: vsrab 2, 3, 4 # encoding: [0x10,0x43,0x23,0x04]
+ vsrab 2, 3, 4
+# CHECK: vsrah 2, 3, 4 # encoding: [0x10,0x43,0x23,0x44]
+ vsrah 2, 3, 4
+# CHECK: vsraw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x84]
+ vsraw 2, 3, 4
+
+# Vector floating-point instructions
+
+# CHECK: vaddfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0a]
+ vaddfp 2, 3, 4
+# CHECK: vsubfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4a]
+ vsubfp 2, 3, 4
+# CHECK: vmaddfp 2, 3, 4, 5 # encoding: [0x10,0x43,0x29,0x2e]
+ vmaddfp 2, 3, 4, 5
+# CHECK: vnmsubfp 2, 3, 4, 5 # encoding: [0x10,0x43,0x29,0x2f]
+ vnmsubfp 2, 3, 4, 5
+
+# CHECK: vmaxfp 2, 3, 4 # encoding: [0x10,0x43,0x24,0x0a]
+ vmaxfp 2, 3, 4
+# CHECK: vminfp 2, 3, 4 # encoding: [0x10,0x43,0x24,0x4a]
+ vminfp 2, 3, 4
+
+# CHECK: vctsxs 2, 3, 4 # encoding: [0x10,0x44,0x1b,0xca]
+ vctsxs 2, 3, 4
+# CHECK: vctuxs 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x8a]
+ vctuxs 2, 3, 4
+# CHECK: vcfsx 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x4a]
+ vcfsx 2, 3, 4
+# CHECK: vcfux 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x0a]
+ vcfux 2, 3, 4
+# CHECK: vrfim 2, 3 # encoding: [0x10,0x40,0x1a,0xca]
+ vrfim 2, 3
+# CHECK: vrfin 2, 3 # encoding: [0x10,0x40,0x1a,0x0a]
+ vrfin 2, 3
+# CHECK: vrfip 2, 3 # encoding: [0x10,0x40,0x1a,0x8a]
+ vrfip 2, 3
+# CHECK: vrfiz 2, 3 # encoding: [0x10,0x40,0x1a,0x4a]
+ vrfiz 2, 3
+
+# CHECK: vcmpbfp 2, 3, 4 # encoding: [0x10,0x43,0x23,0xc6]
+ vcmpbfp 2, 3, 4
+# CHECK: vcmpbfp. 2, 3, 4 # encoding: [0x10,0x43,0x27,0xc6]
+ vcmpbfp. 2, 3, 4
+# CHECK: vcmpeqfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc6]
+ vcmpeqfp 2, 3, 4
+# CHECK: vcmpeqfp. 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc6]
+ vcmpeqfp. 2, 3, 4
+# CHECK: vcmpgefp 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc6]
+ vcmpgefp 2, 3, 4
+# CHECK: vcmpgefp. 2, 3, 4 # encoding: [0x10,0x43,0x25,0xc6]
+ vcmpgefp. 2, 3, 4
+# CHECK: vcmpgtfp 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc6]
+ vcmpgtfp 2, 3, 4
+# CHECK: vcmpgtfp. 2, 3, 4 # encoding: [0x10,0x43,0x26,0xc6]
+ vcmpgtfp. 2, 3, 4
+
+# CHECK: vexptefp 2, 3 # encoding: [0x10,0x40,0x19,0x8a]
+ vexptefp 2, 3
+# CHECK: vlogefp 2, 3 # encoding: [0x10,0x40,0x19,0xca]
+ vlogefp 2, 3
+# CHECK: vrefp 2, 3 # encoding: [0x10,0x40,0x19,0x0a]
+ vrefp 2, 3
+# CHECK: vrsqrtefp 2, 3 # encoding: [0x10,0x40,0x19,0x4a]
+ vrsqrtefp 2, 3
+
+# Vector status and control register instructions
+
+# CHECK: mtvscr 2 # encoding: [0x10,0x00,0x16,0x44]
+ mtvscr 2
+# CHECK: mfvscr 2 # encoding: [0x10,0x40,0x06,0x04]
+ mfvscr 2
+
diff --git a/test/MC/PowerPC/ppc64-encoding.s b/test/MC/PowerPC/ppc64-encoding.s
new file mode 100644
index 0000000000..dda7960638
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-encoding.s
@@ -0,0 +1,480 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Branch facility
+
+# Branch instructions
+
+# CHECK: b target # encoding: [0b010010AA,A,A,0bAAAAAA00]
+# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+ b target
+# FIXME: ba target
+# CHECK: bl target # encoding: [0b010010AA,A,A,0bAAAAAA01]
+# CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24
+ bl target
+# FIXME: bla target
+
+# FIXME: bc 4, 10, target
+# FIXME: bca 4, 10, target
+# FIXME: bcl 4, 10, target
+# FIXME: bcla 4, 10, target
+
+# FIXME: bclr 4, 10, 3
+# FIXME: bclrl 4, 10, 3
+# FIXME: bcctr 4, 10, 3
+# FIXME: bcctrl 4, 10, 3
+
+# Condition register instructions
+
+# FIXME: crand 2, 3, 4
+# FIXME: crnand 2, 3, 4
+# CHECK: cror 2, 3, 4 # encoding: [0x4c,0x43,0x23,0x82]
+ cror 2, 3, 4
+# FIXME: crxor 2, 3, 4
+# FIXME: crnor 2, 3, 4
+# CHECK: creqv 2, 3, 4 # encoding: [0x4c,0x43,0x22,0x42]
+ creqv 2, 3, 4
+# FIXME: crandc 2, 3, 4
+# FIXME: crorc 2, 3, 4
+# CHECK: mcrf 2, 3 # encoding: [0x4d,0x0c,0x00,0x00]
+ mcrf 2, 3
+
+# System call instruction
+
+# FIXME: sc 1
+
+# Fixed-point facility
+
+# Fixed-point load instructions
+
+# CHECK: lbz 2, 128(4) # encoding: [0x88,0x44,0x00,0x80]
+ lbz 2, 128(4)
+# CHECK: lbzx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xae]
+ lbzx 2, 3, 4
+# CHECK: lbzu 2, 128(4) # encoding: [0x8c,0x44,0x00,0x80]
+ lbzu 2, 128(4)
+# CHECK: lbzux 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xee]
+ lbzux 2, 3, 4
+# CHECK: lhz 2, 128(4) # encoding: [0xa0,0x44,0x00,0x80]
+ lhz 2, 128(4)
+# CHECK: lhzx 2, 3, 4 # encoding: [0x7c,0x43,0x22,0x2e]
+ lhzx 2, 3, 4
+# CHECK: lhzu 2, 128(4) # encoding: [0xa4,0x44,0x00,0x80]
+ lhzu 2, 128(4)
+# CHECK: lhzux 2, 3, 4 # encoding: [0x7c,0x43,0x22,0x6e]
+ lhzux 2, 3, 4
+# CHECK: lha 2, 128(4) # encoding: [0xa8,0x44,0x00,0x80]
+ lha 2, 128(4)
+# CHECK: lhax 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xae]
+ lhax 2, 3, 4
+# CHECK: lhau 2, 128(4) # encoding: [0xac,0x44,0x00,0x80]
+ lhau 2, 128(4)
+# CHECK: lhaux 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xee]
+ lhaux 2, 3, 4
+# CHECK: lwz 2, 128(4) # encoding: [0x80,0x44,0x00,0x80]
+ lwz 2, 128(4)
+# CHECK: lwzx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x2e]
+ lwzx 2, 3, 4
+# CHECK: lwzu 2, 128(4) # encoding: [0x84,0x44,0x00,0x80]
+ lwzu 2, 128(4)
+# CHECK: lwzux 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x6e]
+ lwzux 2, 3, 4
+# CHECK: lwa 2, 128(4) # encoding: [0xe8,0x44,0x00,0x82]
+ lwa 2, 128(4)
+# CHECK: lwax 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xaa]
+ lwax 2, 3, 4
+# CHECK: lwaux 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xea]
+ lwaux 2, 3, 4
+# CHECK: ld 2, 128(4) # encoding: [0xe8,0x44,0x00,0x80]
+ ld 2, 128(4)
+# CHECK: ldx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x2a]
+ ldx 2, 3, 4
+# CHECK: ldu 2, 128(4) # encoding: [0xe8,0x44,0x00,0x81]
+ ldu 2, 128(4)
+# CHECK: ldux 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x6a]
+ ldux 2, 3, 4
+
+# Fixed-point store instructions
+
+# CHECK: stb 2, 128(4) # encoding: [0x98,0x44,0x00,0x80]
+ stb 2, 128(4)
+# CHECK: stbx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xae]
+ stbx 2, 3, 4
+# CHECK: stbu 2, 128(4) # encoding: [0x9c,0x44,0x00,0x80]
+ stbu 2, 128(4)
+# CHECK: stbux 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xee]
+ stbux 2, 3, 4
+# CHECK: sth 2, 128(4) # encoding: [0xb0,0x44,0x00,0x80]
+ sth 2, 128(4)
+# CHECK: sthx 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x2e]
+ sthx 2, 3, 4
+# CHECK: sthu 2, 128(4) # encoding: [0xb4,0x44,0x00,0x80]
+ sthu 2, 128(4)
+# CHECK: sthux 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x6e]
+ sthux 2, 3, 4
+# CHECK: stw 2, 128(4) # encoding: [0x90,0x44,0x00,0x80]
+ stw 2, 128(4)
+# CHECK: stwx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2e]
+ stwx 2, 3, 4
+# CHECK: stwu 2, 128(4) # encoding: [0x94,0x44,0x00,0x80]
+ stwu 2, 128(4)
+# CHECK: stwux 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x6e]
+ stwux 2, 3, 4
+# CHECK: std 2, 128(4) # encoding: [0xf8,0x44,0x00,0x80]
+ std 2, 128(4)
+# CHECK: stdx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x2a]
+ stdx 2, 3, 4
+# CHECK: stdu 2, 128(4) # encoding: [0xf8,0x44,0x00,0x81]
+ stdu 2, 128(4)
+# CHECK: stdux 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x6a]
+ stdux 2, 3, 4
+
+# Fixed-point load and store with byte reversal instructions
+
+# CHECK: lhbrx 2, 3, 4 # encoding: [0x7c,0x43,0x26,0x2c]
+ lhbrx 2, 3, 4
+# CHECK: sthbrx 2, 3, 4 # encoding: [0x7c,0x43,0x27,0x2c]
+ sthbrx 2, 3, 4
+# CHECK: lwbrx 2, 3, 4 # encoding: [0x7c,0x43,0x24,0x2c]
+ lwbrx 2, 3, 4
+# CHECK: stwbrx 2, 3, 4 # encoding: [0x7c,0x43,0x25,0x2c]
+ stwbrx 2, 3, 4
+# CHECK: ldbrx 2, 3, 4 # encoding: [0x7c,0x43,0x24,0x28]
+ ldbrx 2, 3, 4
+# CHECK: stdbrx 2, 3, 4 # encoding: [0x7c,0x43,0x25,0x28]
+ stdbrx 2, 3, 4
+
+# FIXME: Fixed-point load and store multiple instructions
+
+# FIXME: Fixed-point move assist instructions
+
+# Fixed-point arithmetic instructions
+
+# CHECK: addi 2, 3, 128 # encoding: [0x38,0x43,0x00,0x80]
+ addi 2, 3, 128
+# CHECK: addis 2, 3, 128 # encoding: [0x3c,0x43,0x00,0x80]
+ addis 2, 3, 128
+# CHECK: add 2, 3, 4 # encoding: [0x7c,0x43,0x22,0x14]
+ add 2, 3, 4
+# CHECK: add. 2, 3, 4 # encoding: [0x7c,0x43,0x22,0x15]
+ add. 2, 3, 4
+# FIXME: addo 2, 3, 4
+# FIXME: addo. 2, 3, 4
+# CHECK: subf 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x50]
+ subf 2, 3, 4
+# CHECK: subf. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x51]
+ subf. 2, 3, 4
+# FIXME: subfo 2, 3, 4
+# FIXME: subfo. 2, 3, 4
+# CHECK: addic 2, 3, 128 # encoding: [0x30,0x43,0x00,0x80]
+ addic 2, 3, 128
+# CHECK: addic. 2, 3, 128 # encoding: [0x34,0x43,0x00,0x80]
+ addic. 2, 3, 128
+# CHECK: subfic 2, 3, 4 # encoding: [0x20,0x43,0x00,0x04]
+ subfic 2, 3, 4
+
+# CHECK: addc 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x14]
+ addc 2, 3, 4
+# CHECK: addc. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x15]
+ addc. 2, 3, 4
+# FIXME: addco 2, 3, 4
+# FIXME: addco. 2, 3, 4
+# CHECK: subfc 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x10]
+ subfc 2, 3, 4
+# CHECK: subfc 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x10]
+ subfc 2, 3, 4
+# FIXME: subfco 2, 3, 4
+# FIXME: subfco. 2, 3, 4
+
+# CHECK: adde 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x14]
+ adde 2, 3, 4
+# CHECK: adde. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x15]
+ adde. 2, 3, 4
+# FIXME: addeo 2, 3, 4
+# FIXME: addeo. 2, 3, 4
+# CHECK: subfe 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x10]
+ subfe 2, 3, 4
+# CHECK: subfe. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x11]
+ subfe. 2, 3, 4
+# FIXME: subfeo 2, 3, 4
+# FIXME: subfeo. 2, 3, 4
+
+# CHECK: addme 2, 3 # encoding: [0x7c,0x43,0x01,0xd4]
+ addme 2, 3
+# CHECK: addme. 2, 3 # encoding: [0x7c,0x43,0x01,0xd5]
+ addme. 2, 3
+# FIXME: addmeo 2, 3
+# FIXME: addmeo. 2, 3
+# CHECK: subfme 2, 3 # encoding: [0x7c,0x43,0x01,0xd0]
+ subfme 2, 3
+# CHECK: subfme. 2, 3 # encoding: [0x7c,0x43,0x01,0xd1]
+ subfme. 2, 3
+# FIXME: subfmeo 2, 3
+# FIXME: subfmeo. 2, 3
+
+# CHECK: addze 2, 3 # encoding: [0x7c,0x43,0x01,0x94]
+ addze 2, 3
+# CHECK: addze. 2, 3 # encoding: [0x7c,0x43,0x01,0x95]
+ addze. 2, 3
+# FIXME: addzeo 2, 3
+# FIXME: addzeo. 2, 3
+# CHECK: subfze 2, 3 # encoding: [0x7c,0x43,0x01,0x90]
+ subfze 2, 3
+# CHECK: subfze. 2, 3 # encoding: [0x7c,0x43,0x01,0x91]
+ subfze. 2, 3
+# FIXME: subfzeo 2, 3
+# FIXME: subfzeo. 2, 3
+
+# CHECK: neg 2, 3 # encoding: [0x7c,0x43,0x00,0xd0]
+ neg 2, 3
+# CHECK: neg. 2, 3 # encoding: [0x7c,0x43,0x00,0xd1]
+ neg. 2, 3
+# FIXME: nego 2, 3
+# FIXME: nego. 2, 3
+
+# CHECK: mulli 2, 3, 128 # encoding: [0x1c,0x43,0x00,0x80]
+ mulli 2, 3, 128
+# CHECK: mulhw 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x96]
+ mulhw 2, 3, 4
+# CHECK: mulhw. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x97]
+ mulhw. 2, 3, 4
+# CHECK: mullw 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd6]
+ mullw 2, 3, 4
+# CHECK: mullw. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd7]
+ mullw. 2, 3, 4
+# FIXME: mullwo 2, 3, 4
+# FIXME: mullwo. 2, 3, 4
+# CHECK: mulhwu 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x16]
+ mulhwu 2, 3, 4
+# CHECK: mulhwu. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x17]
+ mulhwu. 2, 3, 4
+
+# CHECK: divw 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd6]
+ divw 2, 3, 4
+# CHECK: divw. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd7]
+ divw. 2, 3, 4
+# FIXME: divwo 2, 3, 4
+# FIXME: divwo. 2, 3, 4
+# CHECK: divwu 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x96]
+ divwu 2, 3, 4
+# CHECK: divwu. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x97]
+ divwu. 2, 3, 4
+# FIXME: divwuo 2, 3, 4
+# FIXME: divwuo. 2, 3, 4
+# FIXME: divwe 2, 3, 4
+# FIXME: divwe. 2, 3, 4
+# FIXME: divweo 2, 3, 4
+# FIXME: divweo. 2, 3, 4
+# FIXME: divweu 2, 3, 4
+# FIXME: divweu. 2, 3, 4
+# FIXME: divweuo 2, 3, 4
+# FIXME: divweuo. 2, 3, 4
+
+# CHECK: mulld 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd2]
+ mulld 2, 3, 4
+# CHECK: mulld. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd3]
+ mulld. 2, 3, 4
+# FIXME: mulldo 2, 3, 4
+# FIXME: mulldo. 2, 3, 4
+# CHECK: mulhd 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x92]
+ mulhd 2, 3, 4
+# CHECK: mulhd. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x93]
+ mulhd. 2, 3, 4
+# CHECK: mulhdu 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x12]
+ mulhdu 2, 3, 4
+# CHECK: mulhdu. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x13]
+ mulhdu. 2, 3, 4
+
+# CHECK: divd 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd2]
+ divd 2, 3, 4
+# CHECK: divd. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd3]
+ divd. 2, 3, 4
+# FIXME: divdo 2, 3, 4
+# FIXME: divdo. 2, 3, 4
+# CHECK: divdu 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x92]
+ divdu 2, 3, 4
+# CHECK: divdu. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x93]
+ divdu. 2, 3, 4
+# FIXME: divduo 2, 3, 4
+# FIXME: divduo. 2, 3, 4
+# FIXME: divde 2, 3, 4
+# FIXME: divde. 2, 3, 4
+# FIXME: divdeo 2, 3, 4
+# FIXME: divdeo. 2, 3, 4
+# FIXME: divdeu 2, 3, 4
+# FIXME: divdeu. 2, 3, 4
+# FIXME: divdeuo 2, 3, 4
+# FIXME: divdeuo. 2, 3, 4
+
+# FIXME: Fixed-point compare instructions
+
+# FIXME: Fixed-point trap instructions
+
+# Fixed-point select
+
+# CHECK: isel 2, 3, 4, 5 # encoding: [0x7c,0x43,0x21,0x5e]
+ isel 2, 3, 4, 5
+
+# Fixed-point logical instructions
+
+# CHECK: andi. 2, 3, 128 # encoding: [0x70,0x62,0x00,0x80]
+ andi. 2, 3, 128
+# CHECK: andis. 2, 3, 128 # encoding: [0x74,0x62,0x00,0x80]
+ andis. 2, 3, 128
+# CHECK: ori 2, 3, 128 # encoding: [0x60,0x62,0x00,0x80]
+ ori 2, 3, 128
+# CHECK: oris 2, 3, 128 # encoding: [0x64,0x62,0x00,0x80]
+ oris 2, 3, 128
+# CHECK: xori 2, 3, 128 # encoding: [0x68,0x62,0x00,0x80]
+ xori 2, 3, 128
+# CHECK: xoris 2, 3, 128 # encoding: [0x6c,0x62,0x00,0x80]
+ xoris 2, 3, 128
+# CHECK: and 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x38]
+ and 2, 3, 4
+# CHECK: and. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x39]
+ and. 2, 3, 4
+# CHECK: xor 2, 3, 4 # encoding: [0x7c,0x62,0x22,0x78]
+ xor 2, 3, 4
+# CHECK: xor. 2, 3, 4 # encoding: [0x7c,0x62,0x22,0x79]
+ xor. 2, 3, 4
+# CHECK: nand 2, 3, 4 # encoding: [0x7c,0x62,0x23,0xb8]
+ nand 2, 3, 4
+# CHECK: nand. 2, 3, 4 # encoding: [0x7c,0x62,0x23,0xb9]
+ nand. 2, 3, 4
+# CHECK: or 2, 3, 4 # encoding: [0x7c,0x62,0x23,0x78]
+ or 2, 3, 4
+# CHECK: or. 2, 3, 4 # encoding: [0x7c,0x62,0x23,0x79]
+ or. 2, 3, 4
+# CHECK: nor 2, 3, 4 # encoding: [0x7c,0x62,0x20,0xf8]
+ nor 2, 3, 4
+# CHECK: nor. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0xf9]
+ nor. 2, 3, 4
+# CHECK: eqv 2, 3, 4 # encoding: [0x7c,0x62,0x22,0x38]
+ eqv 2, 3, 4
+# CHECK: eqv. 2, 3, 4 # encoding: [0x7c,0x62,0x22,0x39]
+ eqv. 2, 3, 4
+# CHECK: andc 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x78]
+ andc 2, 3, 4
+# CHECK: andc. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x79]
+ andc. 2, 3, 4
+# CHECK: orc 2, 3, 4 # encoding: [0x7c,0x62,0x23,0x38]
+ orc 2, 3, 4
+# CHECK: orc. 2, 3, 4 # encoding: [0x7c,0x62,0x23,0x39]
+ orc. 2, 3, 4
+
+# CHECK: extsb 2, 3 # encoding: [0x7c,0x62,0x07,0x74]
+ extsb 2, 3
+# CHECK: extsb. 2, 3 # encoding: [0x7c,0x62,0x07,0x75]
+ extsb. 2, 3
+# CHECK: extsh 2, 3 # encoding: [0x7c,0x62,0x07,0x34]
+ extsh 2, 3
+# CHECK: extsh. 2, 3 # encoding: [0x7c,0x62,0x07,0x35]
+ extsh. 2, 3
+
+# CHECK: cntlzw 2, 3 # encoding: [0x7c,0x62,0x00,0x34]
+ cntlzw 2, 3
+# CHECK: cntlzw. 2, 3 # encoding: [0x7c,0x62,0x00,0x35]
+ cntlzw. 2, 3
+# FIXME: cmpb 2, 3, 4
+# FIXME: popcntb 2, 3
+# CHECK: popcntw 2, 3 # encoding: [0x7c,0x62,0x02,0xf4]
+ popcntw 2, 3
+# FIXME: prtyd 2, 3
+# FIXME: prtyw 2, 3
+
+# CHECK: extsw 2, 3 # encoding: [0x7c,0x62,0x07,0xb4]
+ extsw 2, 3
+# CHECK: extsw. 2, 3 # encoding: [0x7c,0x62,0x07,0xb5]
+ extsw. 2, 3
+
+# CHECK: cntlzd 2, 3 # encoding: [0x7c,0x62,0x00,0x74]
+ cntlzd 2, 3
+# CHECK: cntlzd. 2, 3 # encoding: [0x7c,0x62,0x00,0x75]
+ cntlzd. 2, 3
+# CHECK: popcntd 2, 3 # encoding: [0x7c,0x62,0x03,0xf4]
+ popcntd 2, 3
+# FIXME: bpermd 2, 3, 4
+
+# Fixed-point rotate and shift instructions
+
+# CHECK: rlwinm 2, 3, 4, 5, 6 # encoding: [0x54,0x62,0x21,0x4c]
+ rlwinm 2, 3, 4, 5, 6
+# CHECK: rlwinm. 2, 3, 4, 5, 6 # encoding: [0x54,0x62,0x21,0x4d]
+ rlwinm. 2, 3, 4, 5, 6
+# CHECK: rlwnm 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4c]
+ rlwnm 2, 3, 4, 5, 6
+# CHECK: rlwnm. 2, 3, 4, 5, 6 # encoding: [0x5c,0x62,0x21,0x4d]
+ rlwnm. 2, 3, 4, 5, 6
+# CHECK: rlwimi 2, 3, 4, 5, 6 # encoding: [0x50,0x62,0x21,0x4c]
+ rlwimi 2, 3, 4, 5, 6
+# CHECK: rlwimi. 2, 3, 4, 5, 6 # encoding: [0x50,0x62,0x21,0x4d]
+ rlwimi. 2, 3, 4, 5, 6
+# CHECK: rldicl 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x40]
+ rldicl 2, 3, 4, 5
+# CHECK: rldicl. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x41]
+ rldicl. 2, 3, 4, 5
+# CHECK: rldicr 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x44]
+ rldicr 2, 3, 4, 5
+# CHECK: rldicr. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x45]
+ rldicr. 2, 3, 4, 5
+# FIXME: rldic 2, 3, 4, 5
+# FIXME: rldic. 2, 3, 4, 5
+# CHECK: rldcl 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x50]
+ rldcl 2, 3, 4, 5
+# CHECK: rldcl. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x51]
+ rldcl. 2, 3, 4, 5
+# FIXME: rldcr 2, 3, 4, 5
+# FIXME: rldcr. 2, 3, 4, 5
+# CHECK: rldimi 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x4c]
+ rldimi 2, 3, 4, 5
+# CHECK: rldimi. 2, 3, 4, 5 # encoding: [0x78,0x62,0x21,0x4d]
+ rldimi. 2, 3, 4, 5
+
+# CHECK: slw 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x30]
+ slw 2, 3, 4
+# CHECK: slw. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x31]
+ slw. 2, 3, 4
+# CHECK: srw 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x30]
+ srw 2, 3, 4
+# CHECK: srw. 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x31]
+ srw. 2, 3, 4
+# CHECK: srawi 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x70]
+ srawi 2, 3, 4
+# CHECK: srawi. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x71]
+ srawi. 2, 3, 4
+# CHECK: sraw 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x30]
+ sraw 2, 3, 4
+# CHECK: sraw. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x31]
+ sraw. 2, 3, 4
+# CHECK: sld 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x36]
+ sld 2, 3, 4
+# CHECK: sld. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x37]
+ sld. 2, 3, 4
+# CHECK: srd 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x36]
+ srd 2, 3, 4
+# CHECK: srd. 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x37]
+ srd. 2, 3, 4
+# CHECK: sradi 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x74]
+ sradi 2, 3, 4
+# CHECK: sradi. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x75]
+ sradi. 2, 3, 4
+# CHECK: srad 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x34]
+ srad 2, 3, 4
+# CHECK: srad. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x35]
+ srad. 2, 3, 4
+
+# FIXME: BCD assist instructions
+
+# Move to/from system register instructions
+
+# FIXME: mtspr 256, 2
+# FIXME: mfspr 2, 256
+# CHECK: mtcrf 16, 2 # encoding: [0x7c,0x41,0x01,0x20]
+ mtcrf 16, 2
+# CHECK: mfcr 2 # encoding: [0x7c,0x40,0x00,0x26]
+ mfcr 2
+# FIXME: mtocrf 16, 2
+# CHECK: mfocrf 16, 8 # encoding: [0x7e,0x10,0x80,0x26]
+ mfocrf 16, 8
+# FIXME: mcrxr 2
+
diff --git a/test/MC/PowerPC/ppc64-errors.s b/test/MC/PowerPC/ppc64-errors.s
new file mode 100644
index 0000000000..1da5753046
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-errors.s
@@ -0,0 +1,80 @@
+
+# RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
+# RUN: FileCheck < %t %s
+
+# Register operands
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: add 32, 32, 32
+ add 32, 32, 32
+
+# CHECK: error: invalid register name
+# CHECK-NEXT: add %r32, %r32, %r32
+ add %r32, %r32, %r32
+
+# Signed 16-bit immediate operands
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: addi 1, 0, -32769
+ addi 1, 0, -32769
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: addi 1, 0, 32768
+ addi 1, 0, 32768
+
+# Unsigned 16-bit immediate operands
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ori 1, 2, -1
+ ori 1, 2, -1
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ori 1, 2, 65536
+ ori 1, 2, 65536
+
+# D-Form memory operands
+
+# CHECK: error: invalid register number
+# CHECK-NEXT: lwz 1, 0(32)
+ lwz 1, 0(32)
+
+# CHECK: error: invalid register name
+# CHECK-NEXT: lwz 1, 0(%r32)
+ lwz 1, 0(%r32)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: lwz 1, -32769(2)
+ lwz 1, -32769(2)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: lwz 1, 32768(2)
+ lwz 1, 32768(2)
+
+# CHECK: error: invalid register number
+# CHECK-NEXT: ld 1, 0(32)
+ ld 1, 0(32)
+
+# CHECK: error: invalid register name
+# CHECK-NEXT: ld 1, 0(%r32)
+ ld 1, 0(%r32)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ld 1, 1(2)
+ ld 1, 1(2)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ld 1, 2(2)
+ ld 1, 2(2)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ld 1, 3(2)
+ ld 1, 3(2)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ld 1, -32772(2)
+ ld 1, -32772(2)
+
+# CHECK: error: invalid operand for instruction
+# CHECK-NEXT: ld 1, 32768(2)
+ ld 1, 32768(2)
+
diff --git a/test/MC/PowerPC/ppc64-operands.s b/test/MC/PowerPC/ppc64-operands.s
new file mode 100644
index 0000000000..de5fcb0e8d
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-operands.s
@@ -0,0 +1,87 @@
+
+# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Register operands
+
+# CHECK: add 1, 2, 3 # encoding: [0x7c,0x22,0x1a,0x14]
+ add 1, 2, 3
+
+# CHECK: add 1, 2, 3 # encoding: [0x7c,0x22,0x1a,0x14]
+ add %r1, %r2, %r3
+
+# CHECK: add 0, 0, 0 # encoding: [0x7c,0x00,0x02,0x14]
+ add 0, 0, 0
+
+# CHECK: add 31, 31, 31 # encoding: [0x7f,0xff,0xfa,0x14]
+ add 31, 31, 31
+
+# CHECK: addi 1, 0, 0 # encoding: [0x38,0x20,0x00,0x00]
+ addi 1, 0, 0
+
+# CHECK: addi 1, 0, 0 # encoding: [0x38,0x20,0x00,0x00]
+ addi 1, %r0, 0
+
+# Signed 16-bit immediate operands
+
+# CHECK: addi 1, 2, 0 # encoding: [0x38,0x22,0x00,0x00]
+ addi 1, 2, 0
+
+# CHECK: addi 1, 0, -32768 # encoding: [0x38,0x20,0x80,0x00]
+ addi 1, 0, -32768
+
+# CHECK: addi 1, 0, 32767 # encoding: [0x38,0x20,0x7f,0xff]
+ addi 1, 0, 32767
+
+# Unsigned 16-bit immediate operands
+
+# CHECK: ori 1, 2, 0 # encoding: [0x60,0x41,0x00,0x00]
+ ori 1, 2, 0
+
+# CHECK: ori 1, 2, 65535 # encoding: [0x60,0x41,0xff,0xff]
+ ori 1, 2, 65535
+
+# D-Form memory operands
+
+# CHECK: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
+ lwz 1, 0(0)
+
+# CHECK: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
+ lwz 1, 0(%r0)
+
+# CHECK: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
+ lwz 1, 0(31)
+
+# CHECK: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
+ lwz 1, 0(%r31)
+
+# CHECK: lwz 1, -32768(2) # encoding: [0x80,0x22,0x80,0x00]
+ lwz 1, -32768(2)
+
+# CHECK: lwz 1, 32767(2) # encoding: [0x80,0x22,0x7f,0xff]
+ lwz 1, 32767(2)
+
+
+# CHECK: ld 1, 0(0) # encoding: [0xe8,0x20,0x00,0x00]
+ ld 1, 0(0)
+
+# CHECK: ld 1, 0(0) # encoding: [0xe8,0x20,0x00,0x00]
+ ld 1, 0(%r0)
+
+# CHECK: ld 1, 0(31) # encoding: [0xe8,0x3f,0x00,0x00]
+ ld 1, 0(31)
+
+# CHECK: ld 1, 0(31) # encoding: [0xe8,0x3f,0x00,0x00]
+ ld 1, 0(%r31)
+
+# CHECK: ld 1, -32768(2) # encoding: [0xe8,0x22,0x80,0x00]
+ ld 1, -32768(2)
+
+# CHECK: ld 1, 32764(2) # encoding: [0xe8,0x22,0x7f,0xfc]
+ ld 1, 32764(2)
+
+# CHECK: ld 1, 4(2) # encoding: [0xe8,0x22,0x00,0x04]
+ ld 1, 4(2)
+
+# CHECK: ld 1, -4(2) # encoding: [0xe8,0x22,0xff,0xfc]
+ ld 1, -4(2)
+