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author | Richard Barton <richard.barton@arm.com> | 2013-10-18 14:09:49 +0000 |
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committer | Richard Barton <richard.barton@arm.com> | 2013-10-18 14:09:49 +0000 |
commit | 485333df7157d6e8681d910d85b271b0bc96b48e (patch) | |
tree | 72080f6fdd1a74a53b41c491ed8dfe21f9996f6a /test/MC | |
parent | c439c205ba304c7ed1c88fb85c2009e49cfbd0c3 (diff) | |
download | llvm-485333df7157d6e8681d910d85b271b0bc96b48e.tar.gz llvm-485333df7157d6e8681d910d85b271b0bc96b48e.tar.bz2 llvm-485333df7157d6e8681d910d85b271b0bc96b48e.tar.xz |
Add hint disassembly syntax for 16-bit Thumb hint instructions.
Patch by Artyom Skrobov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192972 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC')
-rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 17 | ||||
-rw-r--r-- | test/MC/Disassembler/ARM/invalid-thumbv7.txt | 14 | ||||
-rw-r--r-- | test/MC/Disassembler/ARM/thumb2.txt | 7 |
3 files changed, 25 insertions, 13 deletions
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 73ed46bd0c..eb5b6149da 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -3593,6 +3593,11 @@ _func: wfige yieldlt hint.w #4 + hint.w #3 + hint.w #2 + hint.w #1 + hint.w #0 + hint #4 hint #3 hint #2 hint #1 @@ -3610,7 +3615,19 @@ _func: @ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] @ CHECK: yield.w @ encoding: [0xaf,0xf3,0x01,0x80] @ CHECK: nop.w @ encoding: [0xaf,0xf3,0x00,0x80] +@ CHECK: sev @ encoding: [0x40,0xbf] +@ CHECK: wfi @ encoding: [0x30,0xbf] +@ CHECK: wfe @ encoding: [0x20,0xbf] +@ CHECK: yield @ encoding: [0x10,0xbf] +@ CHECK: nop @ encoding: [0x00,0xbf] +@------------------------------------------------------------------------------ +@ Unallocated wide/narrow hints +@------------------------------------------------------------------------------ + hint #7 + hint.w #7 +@ CHECK: hint #7 @ encoding: [0x70,0xbf] +@ CHECK: hint.w #7 @ encoding: [0xaf,0xf3,0x07,0x80] @------------------------------------------------------------------------------ @ Alternate syntax for LDR*(literal) encodings diff --git a/test/MC/Disassembler/ARM/invalid-thumbv7.txt b/test/MC/Disassembler/ARM/invalid-thumbv7.txt index f8adbcfbdc..16970844ae 100644 --- a/test/MC/Disassembler/ARM/invalid-thumbv7.txt +++ b/test/MC/Disassembler/ARM/invalid-thumbv7.txt @@ -32,15 +32,6 @@ # CHECK: invalid instruction encoding # CHECK-NEXT: [0x6f 0xde] - -#------------------------------------------------------------------------------ -# Undefined encoding space for hint instructions -#------------------------------------------------------------------------------ - -[0x60 0xbf] -# CHECK: invalid instruction encoding -# CHECK-NEXT: [0x60 0xbf] - #------------------------------------------------------------------------------ # Undefined encoding for it #------------------------------------------------------------------------------ @@ -49,10 +40,7 @@ # CHECK: potentially undefined instruction encoding # CHECK-NEXT: [0xff 0xbf 0x6b 0x80 0x00 0x75] -# mask = 0 -[0x50 0xbf 0x00 0x00] -# CHECK: invalid instruction encoding -# CHECK-NEXT: [0x50 0xbf 0x00 0x00] +[0x50 0xbf] # hint #5; legal as the third instruction for the iteee above # Two warnings from this block since there are two instructions in there [0xdb 0xbf 0x42 0xbb] diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt index 9fc166f066..c8a24ee3a9 100644 --- a/test/MC/Disassembler/ARM/thumb2.txt +++ b/test/MC/Disassembler/ARM/thumb2.txt @@ -2707,3 +2707,10 @@ 0x30 0xbf 0x10 0xbf +#------------------------------------------------------------------------------ +# Unallocated hints (They execute as NOPs, but software must not use them.) +#------------------------------------------------------------------------------ + +[0x60 0xbf] +# CHECK: hint #6 + |