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| author | Hal Finkel <hfinkel@anl.gov> | 2012-04-27 19:34:00 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-04-27 19:34:00 +0000 |
| commit | e32e5440d6aaff8a77517e9d286846ae9e380770 (patch) | |
| tree | 1fda0f26f420a859da52e0c8697677df509969a2 /test/Transforms/BBVectorize | |
| parent | f6d55df9ecac7f4e3e654b7074729100f6de28ae (diff) | |
| download | llvm-e32e5440d6aaff8a77517e9d286846ae9e380770.tar.gz llvm-e32e5440d6aaff8a77517e9d286846ae9e380770.tar.bz2 llvm-e32e5440d6aaff8a77517e9d286846ae9e380770.tar.xz | |
Don't vectorize target-specific types (ppc_fp128, x86_fp80, etc.).
Target specific types should not be vectorized. As a practical matter,
these types are already register matched (at least in the x86 case),
and codegen does not always work correctly (at least in the ppc case,
and this is not worth fixing because ppc_fp128 is currently broken and
will probably go away soon).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155729 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/BBVectorize')
| -rw-r--r-- | test/Transforms/BBVectorize/simple-tst.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/Transforms/BBVectorize/simple-tst.ll b/test/Transforms/BBVectorize/simple-tst.ll new file mode 100644 index 0000000000..42146c6d14 --- /dev/null +++ b/test/Transforms/BBVectorize/simple-tst.ll @@ -0,0 +1,18 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux" +; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -bb-vectorize-vector-bits=256 -instcombine -gvn -S | FileCheck %s + +; Basic depth-3 chain (target-specific type should not vectorize) +define ppc_fp128 @test7(ppc_fp128 %A1, ppc_fp128 %A2, ppc_fp128 %B1, ppc_fp128 %B2) { +; CHECK: @test7 +; CHECK-NOT: <2 x ppc_fp128> + %X1 = fsub ppc_fp128 %A1, %B1 + %X2 = fsub ppc_fp128 %A2, %B2 + %Y1 = fmul ppc_fp128 %X1, %A1 + %Y2 = fmul ppc_fp128 %X2, %A2 + %Z1 = fadd ppc_fp128 %Y1, %B1 + %Z2 = fadd ppc_fp128 %Y2, %B2 + %R = fmul ppc_fp128 %Z1, %Z2 + ret ppc_fp128 %R +} + |