summaryrefslogtreecommitdiff
path: root/test/Transforms/InstCombine/select.ll
diff options
context:
space:
mode:
authorDuncan Sands <baldrick@free.fr>2010-11-13 15:10:37 +0000
committerDuncan Sands <baldrick@free.fr>2010-11-13 15:10:37 +0000
commit096aa79276b8527a3cbbb3691e40e729dea09523 (patch)
tree3ec9780a5daa0a747ba7e91e8f1910c8ece2bf09 /test/Transforms/InstCombine/select.ll
parent768b87c085c6f608608a848a63a061ffc13de3c1 (diff)
downloadllvm-096aa79276b8527a3cbbb3691e40e729dea09523.tar.gz
llvm-096aa79276b8527a3cbbb3691e40e729dea09523.tar.bz2
llvm-096aa79276b8527a3cbbb3691e40e729dea09523.tar.xz
Generalize the reassociation transform in SimplifyCommutative (now renamed to
SimplifyAssociativeOrCommutative) "(A op C1) op C2" -> "A op (C1 op C2)", which previously was only done if C1 and C2 were constants, to occur whenever "C1 op C2" simplifies (a la InstructionSimplify). Since the simplifying operand combination can no longer be assumed to be the right-hand terms, consider all of the possible permutations. When compiling "gcc as one big file", transform 2 (i.e. using right-hand operands) fires about 4000 times but it has to be said that most of the time the simplifying operands are both constants. Transforms 3, 4 and 5 each fired once. Transform 6, which is an existing transform that I didn't change, never fired. With this change, the testcase is now optimized perfectly with one run of instcombine (previously it required instcombine + reassociate + instcombine, and it may just have been luck that this worked). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119002 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/InstCombine/select.ll')
-rw-r--r--test/Transforms/InstCombine/select.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll
index 62f0eda083..c1c1f08383 100644
--- a/test/Transforms/InstCombine/select.ll
+++ b/test/Transforms/InstCombine/select.ll
@@ -546,3 +546,13 @@ ret:
; CHECK: @test43
; CHECK: ret i1 false
}
+
+define i32 @test44(i1 %cond, i32 %x, i32 %y) {
+ %z = and i32 %x, %y
+ %s = select i1 %cond, i32 %y, i32 %z
+ %r = and i32 %x, %s
+ ret i32 %r
+; CHECK: @test44
+; CHECK: %r = and i32 %x, %y
+; CHECK: ret i32 %r
+}