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authorShuxin Yang <shuxin.llvm@gmail.com>2012-12-04 03:28:32 +0000
committerShuxin Yang <shuxin.llvm@gmail.com>2012-12-04 03:28:32 +0000
commitbba3eb054a4e0e052cdeff22e678c52c4e59f07e (patch)
tree5d2f2bdc5691d86fd14c6736477f1e32763fa0c2 /test/Transforms/InstCombine/shift.ll
parentb715b205a41dc53942acbcfbfdbdce6bdaf9a4aa (diff)
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rdar://12329730 (2nd part, revised)
The type of shirt-right (logical or arithemetic) should remain unchanged when transforming "X << C1 >> C2" into "X << (C1-C2)" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169209 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/InstCombine/shift.ll')
-rw-r--r--test/Transforms/InstCombine/shift.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll
index b152816d2b..fad0bd7ede 100644
--- a/test/Transforms/InstCombine/shift.ll
+++ b/test/Transforms/InstCombine/shift.ll
@@ -723,7 +723,7 @@ define i32 @test60(i32 %x) {
%or = or i32 %shl, 1
ret i32 %or
; CHECK: @test60
-; CHECK: lshr i32 %x, 3
+; CHECK: ashr i32 %x, 3
}