Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122105 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 22 insertions, 0 deletions

diff --git a/test/Transforms/InstCombine/vec_sext.ll b/test/Transforms/InstCombine/vec_sext.ll
new file mode 100644
index 0000000000..d7ab96b9cf
--- /dev/null
+++ b/test/Transforms/InstCombine/vec_sext.ll
@@ -0,0 +1,22 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define <4 x i32> @psignd_3(<4 x i32> %a, <4 x i32> %b) nounwind ssp {
+entry:
+  %cmp = icmp slt <4 x i32> %b, zeroinitializer
+  %sext = sext <4 x i1> %cmp to <4 x i32>
+  %sub = sub nsw <4 x i32> zeroinitializer, %a
+  %0 = icmp slt <4 x i32> %sext, zeroinitializer
+  %sext3 = sext <4 x i1> %0 to <4 x i32>
+  %1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
+  %2 = and <4 x i32> %a, %1
+  %3 = and <4 x i32> %sext3, %sub
+  %cond = or <4 x i32> %2, %3
+  ret <4 x i32> %cond
+
+; CHECK:   ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
+; CHECK:   sub nsw <4 x i32> zeroinitializer, %a
+; CHECK:   xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK:   and <4 x i32> %a, %0
+; CHECK:   and <4 x i32> %b.lobit, %sub
+; CHECK:   or <4 x i32> %1, %2
+}