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authorChandler Carruth <chandlerc@gmail.com>2012-12-17 04:07:37 +0000
committerChandler Carruth <chandlerc@gmail.com>2012-12-17 04:07:37 +0000
commit17c84ea594c6f10cb13c84ebe765b54f234c82ef (patch)
treebf98e1e195a46f7b0f5a3048dc0f29c7f5ecb2d3 /test/Transforms/SROA
parentd6e4397a5b68836d9dae1d4a30da6f54ece51219 (diff)
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Fix the first part of PR14478: memset now works.
PR14478 highlights a serious problem in SROA that simply wasn't being exercised due to a lack of vector input code mixed with C-library function calls. Part of SROA was written carefully to handle subvector accesses via memset and memcpy, but the rewriter never grew support for this. Fixing it required refactoring the subvector access code in other parts of SROA so it could be shared, and then fixing the splat formation logic and using subvector insertion (this patch). The PR isn't quite fixed yet, as memcpy is still broken in the same way. I'm starting on that series of patches now. Hopefully this will be enough to bring the bullet benchmark back to life with the bb-vectorizer enabled, but that may require fixing memcpy as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170301 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/SROA')
-rw-r--r--test/Transforms/SROA/vector-promotion.ll35
1 files changed, 35 insertions, 0 deletions
diff --git a/test/Transforms/SROA/vector-promotion.ll b/test/Transforms/SROA/vector-promotion.ll
index bb34e3f084..f957fef6dd 100644
--- a/test/Transforms/SROA/vector-promotion.ll
+++ b/test/Transforms/SROA/vector-promotion.ll
@@ -279,6 +279,41 @@ entry:
; CHECK-NEXT: ret <4 x i32> %[[ret]]
}
+declare void @llvm.memset.p0i32.i32(i32* nocapture, i32, i32, i32, i1) nounwind
+
+define <4 x i32> @test_subvec_memset() {
+; CHECK: @test_subvec_memset
+entry:
+ %a = alloca <4 x i32>
+; CHECK-NOT: alloca
+
+ %a.gep0 = getelementptr <4 x i32>* %a, i32 0, i32 0
+ %a.cast0 = bitcast i32* %a.gep0 to i8*
+ call void @llvm.memset.p0i8.i32(i8* %a.cast0, i8 0, i32 8, i32 0, i1 false)
+; CHECK-NOT: store
+; CHECK: %[[insert1:.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>, <4 x i32> undef, <4 x i32> <i32 0, i32 1, {{.*}}>
+
+ %a.gep1 = getelementptr <4 x i32>* %a, i32 0, i32 1
+ %a.cast1 = bitcast i32* %a.gep1 to i8*
+ call void @llvm.memset.p0i8.i32(i8* %a.cast1, i8 1, i32 8, i32 0, i1 false)
+; CHECK-NEXT: %[[insert2:.*]] = shufflevector <4 x i32> <i32 undef, i32 16843009, i32 16843009, i32 undef>, <4 x i32> %[[insert1]], <4 x i32> <i32 4, i32 1, i32 2, {{.*}}>
+
+ %a.gep2 = getelementptr <4 x i32>* %a, i32 0, i32 2
+ %a.cast2 = bitcast i32* %a.gep2 to i8*
+ call void @llvm.memset.p0i8.i32(i8* %a.cast2, i8 3, i32 8, i32 0, i1 false)
+; CHECK-NEXT: %[[insert3:.*]] = shufflevector <4 x i32> <i32 undef, i32 undef, i32 50529027, i32 50529027>, <4 x i32> %[[insert2]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
+
+ %a.gep3 = getelementptr <4 x i32>* %a, i32 0, i32 3
+ %a.cast3 = bitcast i32* %a.gep3 to i8*
+ call void @llvm.memset.p0i8.i32(i8* %a.cast3, i8 7, i32 4, i32 0, i1 false)
+; CHECK-NEXT: %[[insert4:.*]] = insertelement <4 x i32> %[[insert3]], i32 117901063, i32 3
+
+ %ret = load <4 x i32>* %a
+
+ ret <4 x i32> %ret
+; CHECK-NEXT: ret <4 x i32> %[[insert4]]
+}
+
define i32 @PR14212() {
; CHECK: @PR14212
; This caused a crash when "splitting" the load of the i32 in order to promote