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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-07-12 13:45:15 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-07-12 13:45:15 +0000 |
| commit | 4dff258bfb2c894f26c59a76ff81527896ae1d9e (patch) | |
| tree | ab7c91b12f2d021acd579b9f2a36f48d9e32aab7 /test | |
| parent | 9ae2dfd2615a35319d3c4dd042737c3a71ba1048 (diff) | |
| download | llvm-4dff258bfb2c894f26c59a76ff81527896ae1d9e.tar.gz llvm-4dff258bfb2c894f26c59a76ff81527896ae1d9e.tar.bz2 llvm-4dff258bfb2c894f26c59a76ff81527896ae1d9e.tar.xz | |
The LIT tests below do not specify the exact cpu model and fail on AVX2 machines, because we select different instructions such as vbroadcast, new shuffles, etc.
Patch by Michael Liao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160129 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/constant-pool-sharing.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/ctpop-combine.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/store_op_load_fold2.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/vec_shuffle-38.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/xor.ll | 6 |
5 files changed, 9 insertions, 9 deletions
diff --git a/test/CodeGen/X86/constant-pool-sharing.ll b/test/CodeGen/X86/constant-pool-sharing.ll index f979945835..26318dd6c5 100644 --- a/test/CodeGen/X86/constant-pool-sharing.ll +++ b/test/CodeGen/X86/constant-pool-sharing.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck %s ; llc should share constant pool entries between this integer vector ; and this floating-point vector since they have the same encoding. diff --git a/test/CodeGen/X86/ctpop-combine.ll b/test/CodeGen/X86/ctpop-combine.ll index 6406cc73e4..0a3dfca228 100644 --- a/test/CodeGen/X86/ctpop-combine.ll +++ b/test/CodeGen/X86/ctpop-combine.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s declare i64 @llvm.ctpop.i64(i64) nounwind readnone diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll index 8313166a90..6e4fe90053 100644 --- a/test/CodeGen/X86/store_op_load_fold2.ll +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT -; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL +; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT +; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL target datalayout = "e-p:32:32" %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/test/CodeGen/X86/vec_shuffle-38.ll b/test/CodeGen/X86/vec_shuffle-38.ll index 96ef883c4e..ec196df7ae 100644 --- a/test/CodeGen/X86/vec_shuffle-38.ll +++ b/test/CodeGen/X86/vec_shuffle-38.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s define <2 x double> @ld(<2 x double> %p) nounwind optsize ssp { ; CHECK: unpcklpd diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll index ddc4cab14a..73416eff0e 100644 --- a/test/CodeGen/X86/xor.ll +++ b/test/CodeGen/X86/xor.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; Though it is undefined, we want xor undef,undef to produce zero. define <4 x i32> @test1() nounwind { |