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| author | Pawel Wodnicki <pawel@32bitmicro.com> | 2012-11-19 22:17:54 +0000 |
|---|---|---|
| committer | Pawel Wodnicki <pawel@32bitmicro.com> | 2012-11-19 22:17:54 +0000 |
| commit | 97b07299fad0d019224912afe63fa916c4a0c507 (patch) | |
| tree | 62ee88b7a34f55ee515bc1f551270be75d8a7370 /test | |
| parent | 2439c573e6f9bc76d6bfd99bbac0b097f2c1a2d7 (diff) | |
| download | llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.gz llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.bz2 llvm-97b07299fad0d019224912afe63fa916c4a0c507.tar.xz | |
Merging r167855 into 3.2 relase branch
Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.
This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@168334 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/PowerPC/2012-10-11-dynalloc.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/2012-10-11-dynalloc.ll b/test/CodeGen/PowerPC/2012-10-11-dynalloc.ll new file mode 100644 index 0000000000..41533a8f32 --- /dev/null +++ b/test/CodeGen/PowerPC/2012-10-11-dynalloc.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define void @test(i64 %n) nounwind { +entry: + %0 = alloca i8, i64 %n, align 1 + %1 = alloca i8, i64 %n, align 1 + call void @use(i8* %0, i8* %1) nounwind + ret void +} + +declare void @use(i8*, i8*) + +; Check we actually have two instances of dynamic stack allocation, +; identified by the stdux used to update the back-chain link. +; CHECK: stdux +; CHECK: stdux |