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| author | David Goodwin <david_goodwin@apple.com> | 2009-09-30 00:10:16 +0000 |
|---|---|---|
| committer | David Goodwin <david_goodwin@apple.com> | 2009-09-30 00:10:16 +0000 |
| commit | 0dad89fa94536284d51f60868326294b725a0c61 (patch) | |
| tree | 53eeb8d67888100785043a6d582fcf66be18b406 /test | |
| parent | 6deec348a840481861a9c487ec9076b64b8c23c4 (diff) | |
| download | llvm-0dad89fa94536284d51f60868326294b725a0c61.tar.gz llvm-0dad89fa94536284d51f60868326294b725a0c61.tar.bz2 llvm-0dad89fa94536284d51f60868326294b725a0c61.tar.xz | |
Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/2009-08-21-PostRAKill.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-08-21-PostRAKill2.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-08-21-PostRAKill3.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-08-21-PostRAKill4.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-09-01-PostRAProlog.ll | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill.ll index 666f00256a..49cde25265 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill.ll +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 -mcpu=cortex-a8 -post-RA-scheduler +; RUN: llc < %s -march=arm -mattr=+vfp2,+postrasched -mcpu=cortex-a8 ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll index a21ffc38d0..5c55ad2abc 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler +; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -mattr=+postrasched ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll index e3d8ea60f9..dacb7478c6 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler +; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -mattr=+postrasched ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll index 9123377e71..d497d1c884 100644 --- a/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll +++ b/test/CodeGen/ARM/2009-08-21-PostRAKill4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler +; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -mattr=+postrasched ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" diff --git a/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll b/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll index 508ff5e434..438073b617 100644 --- a/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll +++ b/test/CodeGen/ARM/2009-09-01-PostRAProlog.ll @@ -1,5 +1,5 @@ ; XFAIL: * -; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler | FileCheck %s +; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -mattr=+postrasched | FileCheck %s ; ModuleID = '<stdin>' |