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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-13 00:19:43 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-05-13 00:19:43 +0000 |
| commit | 4bf4bafcced902ee6d58a90486768f08a3795d02 (patch) | |
| tree | ca6671e10a6b83770e2a8c8274f78004b9d380d0 /test | |
| parent | 63e34f690c511a146b936435f84ee76fda154f7c (diff) | |
| download | llvm-4bf4bafcced902ee6d58a90486768f08a3795d02.tar.gz llvm-4bf4bafcced902ee6d58a90486768f08a3795d02.tar.bz2 llvm-4bf4bafcced902ee6d58a90486768f08a3795d02.tar.xz | |
Take allocation hints from copy instructions to/from physregs.
This causes way more identity copies to be generated, ripe for coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103686 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-09-18-inline-asm-2.ll | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll index 0a75f7a777..be74312777 100644 --- a/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll +++ b/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll @@ -7,8 +7,8 @@ ; CHECK: subfze r4,r6 ; LOCAL: subfc r6,r5,r4 ; LOCAL: subfze r3,r3 -; FAST: subfc r9,r8,r7 -; FAST: subfze r10,r6 +; FAST: subfc r3,r5,r4 +; FAST: subfze r4,r6 ; PR1357 diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index 5a1ca88498..d3a227d353 100644 --- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86 | grep "#%ebp %esi %edi 8(%edx) %eax (%ebx)" ; RUN: llc < %s -march=x86 -regalloc=local | grep "#%edi %ebp %edx 8(%ebx) %eax (%esi)" -; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ecx %ebx %edi 8(%ebp) %eax (%esi)" +; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ecx %ebx %edx 8(%edi) %eax (%esi)" ; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th |