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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-02 23:52:55 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-02 23:52:55 +0000 |
| commit | 5047d7657503dfa8f7d97909c9d5c198646cd0ed (patch) | |
| tree | aade617964af2fabe3809e8ba4bcc4c6c64cada8 /test | |
| parent | b8e052e123a1950adc180b89d8aba0df7765964f (diff) | |
| download | llvm-5047d7657503dfa8f7d97909c9d5c198646cd0ed.tar.gz llvm-5047d7657503dfa8f7d97909c9d5c198646cd0ed.tar.bz2 llvm-5047d7657503dfa8f7d97909c9d5c198646cd0ed.tar.xz | |
Pseudo CMOV instructions don't clobber EFLAGS.
The explanation about a 0 argument being materialized as xor is no
longer valid. Rematerialization will check if EFLAGS is live before
clobbering it.
The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.
This causes one less testb instruction to be generated in the cmov.ll
test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/cmov.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/or-address.ll | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/X86/cmov.ll b/test/CodeGen/X86/cmov.ll index 39d9d1e9ec..7a8d6e6a8a 100644 --- a/test/CodeGen/X86/cmov.ll +++ b/test/CodeGen/X86/cmov.ll @@ -90,8 +90,8 @@ bb.i.i.i: ; preds = %entry ; CHECK: test4: ; CHECK: g_100 ; CHECK: testb -; CHECK: testb %al, %al -; CHECK-NEXT: setne %al +; CHECK-NOT: xor +; CHECK: setne ; CHECK-NEXT: testb func_4.exit.i: ; preds = %bb.i.i.i, %entry diff --git a/test/CodeGen/X86/or-address.ll b/test/CodeGen/X86/or-address.ll index b3fc62736b..f866e419c3 100644 --- a/test/CodeGen/X86/or-address.ll +++ b/test/CodeGen/X86/or-address.ll @@ -47,10 +47,10 @@ return: ; preds = %bb } ; CHECK: test1: -; CHECK: movl %{{.*}}, (%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 8(%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 4(%rdi,%rcx,4) -; CHECK: movl %{{.*}}, 12(%rdi,%rcx,4) +; CHECK: movl %{{.*}}, (%[[RDI:...]],%[[RCX:...]],4) +; CHECK: movl %{{.*}}, 8(%[[RDI]],%[[RCX]],4) +; CHECK: movl %{{.*}}, 4(%[[RDI]],%[[RCX]],4) +; CHECK: movl %{{.*}}, 12(%[[RDI]],%[[RCX]],4) define void @test1(i32* nocapture %array, i32 %r0, i8 signext %k, i8 signext %i0) nounwind { bb.nph: |