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author | Evan Cheng <evan.cheng@apple.com> | 2011-04-26 21:31:35 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-04-26 21:31:35 +0000 |
commit | 554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3 (patch) | |
tree | 94e9a50d8a25d4072cacd8cf9b2634461838e079 /test | |
parent | 90fab0f9d8e275f26f2e58bd5aaf9a3ac389dfaa (diff) | |
download | llvm-554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3.tar.gz llvm-554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3.tar.bz2 llvm-554daa67bd1c4f01fb7a00f2f4255a52b81e9fa3.tar.xz |
Be careful about scheduling nodes above previous calls. It increase usages of
more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/ARM/2011-04-26-SchedTweak.ll | 70 | ||||
-rw-r--r-- | test/CodeGen/ARM/shifter_operand.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/pic.ll | 2 |
5 files changed, 73 insertions, 23 deletions
diff --git a/test/CodeGen/ARM/2011-04-26-SchedTweak.ll b/test/CodeGen/ARM/2011-04-26-SchedTweak.ll new file mode 100644 index 0000000000..ed7dd03320 --- /dev/null +++ b/test/CodeGen/ARM/2011-04-26-SchedTweak.ll @@ -0,0 +1,70 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -mcpu=cortex-a8 | FileCheck %s + +; Do not move the umull above previous call which would require use of +; more callee-saved registers and introduce copies. +; rdar://9329627 + +%struct.FF = type { i32 (i32*)*, i32 (i32*, i32*, i32, i32, i32, i32)*, i32 (i32, i32, i8*)*, void ()*, i32 (i32, i8*, i32*)*, i32 ()* } +%struct.BD = type { %struct.BD*, i32, i32, i32, i32, i64, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i64, i32)*, [16 x i8], i64, i64 } + +@FuncPtr = external hidden unnamed_addr global %struct.FF* +@.str1 = external hidden unnamed_addr constant [6 x i8], align 4 +@G = external unnamed_addr global i32 +@.str2 = external hidden unnamed_addr constant [58 x i8], align 4 +@.str3 = external hidden unnamed_addr constant [58 x i8], align 4 + +define i32 @test() nounwind optsize ssp { +entry: +; CHECK: test: +; CHECK: push +; CHECK-NOT: push + %block_size = alloca i32, align 4 + %block_count = alloca i32, align 4 + %index_cache = alloca i32, align 4 + store i32 0, i32* %index_cache, align 4 + %tmp = load i32* @G, align 4 + %tmp1 = call i32 @bar(i32 0, i32 0, i32 %tmp) nounwind + switch i32 %tmp1, label %bb8 [ + i32 0, label %bb + i32 536870913, label %bb4 + i32 536870914, label %bb6 + ] + +bb: + %tmp2 = load i32* @G, align 4 + %tmp4 = icmp eq i32 %tmp2, 0 + br i1 %tmp4, label %bb1, label %bb8 + +bb1: +; CHECK: %bb1 +; CHECK-NOT: umull +; CHECK: blx _Get +; CHECK: umull +; CHECK: blx _foo + %tmp5 = load i32* %block_size, align 4 + %tmp6 = load i32* %block_count, align 4 + %tmp7 = call %struct.FF* @Get() nounwind + store %struct.FF* %tmp7, %struct.FF** @FuncPtr, align 4 + %tmp10 = zext i32 %tmp6 to i64 + %tmp11 = zext i32 %tmp5 to i64 + %tmp12 = mul nsw i64 %tmp10, %tmp11 + %tmp13 = call i32 @foo(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), i64 %tmp12, i32 %tmp5) nounwind + br label %bb8 + +bb4: + ret i32 0 + +bb6: + ret i32 1 + +bb8: + ret i32 -1 +} + +declare i32 @printf(i8*, ...) + +declare %struct.FF* @Get() + +declare i32 @foo(i8*, i64, i32) + +declare i32 @bar(i32, i32, i32) diff --git a/test/CodeGen/ARM/shifter_operand.ll b/test/CodeGen/ARM/shifter_operand.ll index be891bc76d..f0e2d10261 100644 --- a/test/CodeGen/ARM/shifter_operand.ll +++ b/test/CodeGen/ARM/shifter_operand.ll @@ -58,7 +58,7 @@ entry: ; A8: str r2, [r0, r1, lsl #2] ; A9: test4: -; A9: add r0, r0, r4, lsl #2 +; A9: add r0, r0, r{{[0-9]+}}, lsl #2 ; A9: ldr r1, [r0] ; A9: str r1, [r0] %0 = tail call i8* (...)* @malloc(i32 undef) nounwind diff --git a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll b/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll deleted file mode 100644 index fad26693e7..0000000000 --- a/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: llc < %s -regalloc=fast -relocation-model=pic | FileCheck %s - -target triple = "thumbv6-apple-darwin10" - -@fred = internal global i32 0 ; <i32*> [#uses=1] - -define void @foo() nounwind { -entry: -; CHECK: str r0, [sp - %0 = call i32 (...)* @bar() nounwind ; <i32> [#uses=1] -; CHECK: blx _bar -; CHECK: ldr r1, [sp - store i32 %0, i32* @fred, align 4 - br label %return - -return: ; preds = %entry - ret void -} - -declare i32 @bar(...) diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll index 789a891697..3594424e29 100644 --- a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll +++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll @@ -13,7 +13,7 @@ define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string< ; CHECK: _ZNKSs7compareERKSs: ; CHECK: it eq ; CHECK-NEXT: subeq r0, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ldmia.w sp!, {r4, r5, r6, r7, r8, pc} +; CHECK-NEXT: ldmia.w sp!, entry: %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3] %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3] diff --git a/test/CodeGen/X86/pic.ll b/test/CodeGen/X86/pic.ll index dc5fcd78dc..fb60ac2a60 100644 --- a/test/CodeGen/X86/pic.ll +++ b/test/CodeGen/X86/pic.ll @@ -79,8 +79,8 @@ entry: ; LINUX-NEXT: .L3$pb: ; LINUX: popl ; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %[[REG3:e..]] -; LINUX: movl pfoo@GOT(%[[REG3]]), ; LINUX: calll afoo@PLT +; LINUX: movl pfoo@GOT(%[[REG3]]), ; LINUX: calll * } |