diff options
author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-08-26 12:45:35 +0000 |
---|---|---|
committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2013-08-26 12:45:35 +0000 |
commit | 92bfb547700550fcdb668862533e4952a8d74969 (patch) | |
tree | b4ed707646d62007d9781b52759757674f318f72 /test | |
parent | e4bf77a1282bfdacb61bae192fdf79a696be780a (diff) | |
download | llvm-92bfb547700550fcdb668862533e4952a8d74969.tar.gz llvm-92bfb547700550fcdb668862533e4952a8d74969.tar.bz2 llvm-92bfb547700550fcdb668862533e4952a8d74969.tar.xz |
AVX-512: Added shuffle instructions -
VPSHUFD, VPERMILPS, VMOVDDUP, VMOVLHPS, VMOVHLPS, VSHUFPS, VALIGN
single and double forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189215 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/avx512-shuffle.ll | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx512-shuffle.ll b/test/CodeGen/X86/avx512-shuffle.ll index df9106eef3..9495c65e9f 100644 --- a/test/CodeGen/X86/avx512-shuffle.ll +++ b/test/CodeGen/X86/avx512-shuffle.ll @@ -106,6 +106,53 @@ define <16 x i32> @test11(<16 x i32> %a, <16 x i32>* %b) nounwind { ret <16 x i32> %d } +; CHECK-LABEL: test12 +; CHECK: vmovlhpsz %xmm +; CHECK: ret +define <4 x i32> @test12(<4 x i32> %a, <4 x i32> %b) nounwind { + %c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5> + ret <4 x i32> %c +} + +; CHECK-LABEL: test13 +; CHECK: vpermilps $-79, %zmm +; CHECK: ret +define <16 x float> @test13(<16 x float> %a) { + %b = shufflevector <16 x float> %a, <16 x float> undef, <16 x i32><i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14> + ret <16 x float> %b +} + +; CHECK-LABEL: test14 +; CHECK: vpermilpd $-53, %zmm +; CHECK: ret +define <8 x double> @test14(<8 x double> %a) { + %b = shufflevector <8 x double> %a, <8 x double> undef, <8 x i32><i32 1, i32 1, i32 2, i32 3, i32 4, i32 4, i32 7, i32 7> + ret <8 x double> %b +} + +; CHECK-LABEL: test15 +; CHECK: vpshufd $-79, %zmm +; CHECK: ret +define <16 x i32> @test15(<16 x i32> %a) { + %b = shufflevector <16 x i32> %a, <16 x i32> undef, <16 x i32><i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14> + ret <16 x i32> %b +} +; CHECK-LABEL: test16 +; CHECK: valignq $2, %zmm0, %zmm1 +; CHECK: ret +define <8 x double> @test16(<8 x double> %a, <8 x double> %b) nounwind { + %c = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9> + ret <8 x double> %c +} + +; CHECK-LABEL: test17 +; CHECK: vshufpd $19, %zmm1, %zmm0 +; CHECK: ret +define <8 x double> @test17(<8 x double> %a, <8 x double> %b) nounwind { + %c = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 1, i32 9, i32 2, i32 10, i32 5, i32 undef, i32 undef, i32 undef> + ret <8 x double> %c +} + ; CHECK-LABEL: test18 ; CHECK: vpunpckhdq %zmm ; CHECK: ret @@ -138,3 +185,18 @@ define <16 x float> @test21(<16 x float> %a, <16 x float> %c) { ret <16 x float> %b } +; CHECK-LABEL: test22 +; CHECK: vmovhlpsz %xmm +; CHECK: ret +define <4 x i32> @test22(<4 x i32> %a, <4 x i32> %b) nounwind { + %c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 6, i32 7> + ret <4 x i32> %c +} + +; CHECK-LABEL: @test23 +; CHECK: vshufps $-112, %zmm +; CHECK: ret +define <16 x float> @test23(<16 x float> %a, <16 x float> %c) { + %b = shufflevector <16 x float> %a, <16 x float> %c, <16 x i32><i32 0, i32 0, i32 17, i32 18, i32 4, i32 4, i32 21, i32 22, i32 8, i32 8, i32 25, i32 26, i32 12, i32 12, i32 29, i32 30> + ret <16 x float> %b +}
\ No newline at end of file |