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author | Tom Stellard <thomas.stellard@amd.com> | 2014-05-15 20:55:58 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-05-15 20:55:58 +0000 |
commit | ffecacb1a1eeca8ca8567057c3c886161837d2a6 (patch) | |
tree | 69d6bcb1b49ee7dc0b3b1d0c6f2ebe6f31d366b4 /test | |
parent | e47eb279d50f38374a3f5b95a8c4bcc2112ed408 (diff) | |
download | llvm-ffecacb1a1eeca8ca8567057c3c886161837d2a6.tar.gz llvm-ffecacb1a1eeca8ca8567057c3c886161837d2a6.tar.bz2 llvm-ffecacb1a1eeca8ca8567057c3c886161837d2a6.tar.xz |
Merging r208501:
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r208501 | hfinkel | 2014-05-11 12:23:29 -0400 (Sun, 11 May 2014) | 9 lines
[PowerPC] On PPC32, 128-bit shifts might be runtime calls
The counter-loops formation pass needs to know what operations might be
function calls (because they can't appear in counter-based loops). On PPC32,
128-bit shifts might be runtime calls (even though you can't use __int128 on
PPC32, it seems that SROA might form them).
Fixes PR19709.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@208916 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/PowerPC/ctrloop-sh.ll | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/ctrloop-sh.ll b/test/CodeGen/PowerPC/ctrloop-sh.ll new file mode 100644 index 0000000000..d8e6fc79a6 --- /dev/null +++ b/test/CodeGen/PowerPC/ctrloop-sh.ll @@ -0,0 +1,72 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "E-m:e-p:32:32-i128:64-n32" +target triple = "powerpc-ellcc-linux" + +; Function Attrs: nounwind +define void @foo1(i128* %a, i128* readonly %b, i128* readonly %c) #0 { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %0 = load i128* %b, align 16 + %1 = load i128* %c, align 16 + %shl = shl i128 %0, %1 + store i128 %shl, i128* %a, align 16 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, 2048 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void + +; CHECK-LABEL: @foo1 +; CHECK-NOT: mtctr +} + +; Function Attrs: nounwind +define void @foo2(i128* %a, i128* readonly %b, i128* readonly %c) #0 { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %0 = load i128* %b, align 16 + %1 = load i128* %c, align 16 + %shl = ashr i128 %0, %1 + store i128 %shl, i128* %a, align 16 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, 2048 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void + +; CHECK-LABEL: @foo2 +; CHECK-NOT: mtctr +} + +; Function Attrs: nounwind +define void @foo3(i128* %a, i128* readonly %b, i128* readonly %c) #0 { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %0 = load i128* %b, align 16 + %1 = load i128* %c, align 16 + %shl = lshr i128 %0, %1 + store i128 %shl, i128* %a, align 16 + %inc = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %inc, 2048 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void + +; CHECK-LABEL: @foo3 +; CHECK-NOT: mtctr +} + +attributes #0 = { nounwind } + |