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| author | Jim Grosbach <grosbach@apple.com> | 2014-02-07 00:16:33 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2014-02-07 00:16:33 +0000 |
| commit | 1f65cfad962a2f0c27b2dcc2324a76c427ba7e2b (patch) | |
| tree | d8131ef94f0732551a7aa8fd804736166066b49b /test | |
| parent | 1dd4d5f760602de5a1f26abf2d4e6d67007696ad (diff) | |
| download | llvm-1f65cfad962a2f0c27b2dcc2324a76c427ba7e2b.tar.gz llvm-1f65cfad962a2f0c27b2dcc2324a76c427ba7e2b.tar.bz2 llvm-1f65cfad962a2f0c27b2dcc2324a76c427ba7e2b.tar.xz | |
X86: Resolve a long standing FIXME and properly isel pextr[bw].
Generalize the AArch64 .td nodes for AssertZext and AssertSext. Use
them to match the relevant pextr store instructions.
The test widen_load-2.ll requires a slight change because with the
stores gone, the remaining instructions are scheduled in a different
order.
Add test cases for SSE4 and AVX variants.
Resolves rdar://13414672.
Patch by Adam Nemet <anemet@apple.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200957 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/extract-store.ll | 22 | ||||
| -rw-r--r-- | test/CodeGen/X86/widen_load-2.ll | 2 |
2 files changed, 23 insertions, 1 deletions
diff --git a/test/CodeGen/X86/extract-store.ll b/test/CodeGen/X86/extract-store.ll new file mode 100644 index 0000000000..27d93804ba --- /dev/null +++ b/test/CodeGen/X86/extract-store.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -o - -mcpu=generic -march=x86-64 -mattr=+sse4.1 | FileCheck %s -check-prefix=SSE41 +; RUN: llc < %s -o - -mcpu=generic -march=x86-64 -mattr=+avx | FileCheck %s -check-prefix=AVX + +define void @pextrb(i8* nocapture %dst, <16 x i8> %foo) { +; AVX: vpextrb +; SSE41: pextrb +; AVX-NOT: movb +; SSE41-NOT: movb + %vecext = extractelement <16 x i8> %foo, i32 15 + store i8 %vecext, i8* %dst, align 1 + ret void +} + +define void @pextrw(i16* nocapture %dst, <8 x i16> %foo) { +; AVX: vpextrw +; SSE41: pextrw +; AVX-NOT: movw +; SSE41-NOT: movw + %vecext = extractelement <8 x i16> %foo, i32 15 + store i16 %vecext, i16* %dst, align 1 + ret void +} diff --git a/test/CodeGen/X86/widen_load-2.ll b/test/CodeGen/X86/widen_load-2.ll index 26815a422e..41bea859f4 100644 --- a/test/CodeGen/X86/widen_load-2.ll +++ b/test/CodeGen/X86/widen_load-2.ll @@ -149,9 +149,9 @@ define void @add31i8(%i8vec31* nocapture sret %ret, %i8vec31* %ap, %i8vec31* %bp ; CHECK: movdqa ; CHECK: paddb ; CHECK: paddb -; CHECK: movq ; CHECK: pextrb ; CHECK: pextrw +; CHECK: movq ; CHECK: ret %a = load %i8vec31* %ap, align 16 %b = load %i8vec31* %bp, align 16 |