summaryrefslogtreecommitdiff
path: root/test
diff options
context:
space:
mode:
authorOliver Stannard <oliver.stannard@arm.com>2014-02-07 11:19:53 +0000
committerOliver Stannard <oliver.stannard@arm.com>2014-02-07 11:19:53 +0000
commitc8f5d438208fefc4f45034ba748861cf68a5911d (patch)
treecc3664226036f477c39c57b6f85c6acf023926fc /test
parentfba9c104b9f2b3bf406631ef988f94affa935718 (diff)
downloadllvm-c8f5d438208fefc4f45034ba748861cf68a5911d.tar.gz
llvm-c8f5d438208fefc4f45034ba748861cf68a5911d.tar.bz2
llvm-c8f5d438208fefc4f45034ba748861cf68a5911d.tar.xz
LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack
According to the AAPCS, when a CPRC is allocated to the stack, all other VFP registers should be marked as unavailable. I have also modified the rules for allocating non-CPRCs to the stack, to make it more explicit that all GPRs must be made unavailable. I cannot think of a case where the old version would produce incorrect answers, so there is no test for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200970 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/CodeGen/ARM/2014-02-05-vfp-regs-after-stack.ll22
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2014-02-05-vfp-regs-after-stack.ll b/test/CodeGen/ARM/2014-02-05-vfp-regs-after-stack.ll
new file mode 100644
index 0000000000..4c36a2a6a5
--- /dev/null
+++ b/test/CodeGen/ARM/2014-02-05-vfp-regs-after-stack.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -o - -filetype=asm | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
+target triple = "armv8-none--eabi"
+
+; CHECK-LABEL: fn1:
+define arm_aapcs_vfpcc float @fn1(double %a, double %b, double %c, double %d, double %e, double %f, double %g, float %h, double %i, float %j) {
+ ret float %j
+; CHECK: vldr s0, [sp, #8]
+}
+
+; CHECK-LABEL: fn2:
+define arm_aapcs_vfpcc float @fn2(double %a, double %b, double %c, double %d, double %e, double %f, float %h, <4 x float> %i, float %j) {
+ ret float %j
+; CHECK: vldr s0, [sp, #16]
+}
+
+; CHECK-LABEL: fn3:
+define arm_aapcs_vfpcc float @fn3(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, float %j) #0 {
+ ret float %j
+; CHECK: vldr s0, [sp, #8]
+}