diff options
author | Bill Wendling <isanbard@gmail.com> | 2011-05-23 00:18:33 +0000 |
---|---|---|
committer | Bill Wendling <isanbard@gmail.com> | 2011-05-23 00:18:33 +0000 |
commit | f415d8b64687d4db7e1986b74e9da6cae72c0fd1 (patch) | |
tree | d82346b645973a93ed9270b6ae5782f8664f1b30 /utils/TableGen/AsmWriterEmitter.cpp | |
parent | 6083bb935373020af240bdf8fbec1cdcf360303f (diff) | |
download | llvm-f415d8b64687d4db7e1986b74e9da6cae72c0fd1.tar.gz llvm-f415d8b64687d4db7e1986b74e9da6cae72c0fd1.tar.bz2 llvm-f415d8b64687d4db7e1986b74e9da6cae72c0fd1.tar.xz |
Use a more efficient data structure for the "operand map". The number of
operands to an instruction aren't great, so an iterative search is fairly quick
and doesn't have the overhead of std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131886 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmWriterEmitter.cpp')
-rw-r--r-- | utils/TableGen/AsmWriterEmitter.cpp | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 2b1a4cc8a3..e6deb6908e 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -670,8 +670,8 @@ public: for (std::map<StringRef, unsigned>::iterator I = OpMap.begin(), E = OpMap.end(); I != E; ++I) - O.indent(6) << "OpMap[\"" << I->first << "\"] = " - << I->second << ";\n"; + O.indent(6) << "OpMap.push_back(std::make_pair(\"" << I->first << "\", " + << I->second << "));\n"; O.indent(6) << "break;\n"; O.indent(4) << '}'; @@ -754,6 +754,20 @@ static void EmitComputeAvailableFeatures(AsmWriterInfo &Info, O << "}\n\n"; } +static void EmitGetMapOperandNumber(raw_ostream &O) { + O << "static unsigned getMapOperandNumber(" + << "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n"; + O << " StringRef Name) {\n"; + O << " for (SmallVectorImpl<std::pair<StringRef, unsigned> >::" + << "const_iterator\n"; + O << " I = OpMap.begin(), E = OpMap.end(); I != E; ++I)\n"; + O << " if (I->first == Name)\n"; + O << " return I->second;\n"; + O << " assert(false && \"Operand not in map!\");\n"; + O << " return 0;\n"; + O << "}\n\n"; +} + void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) { CodeGenTarget Target(Records); @@ -934,9 +948,12 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { EmitSubtargetFeatureFlagEnumeration(AWI, O); EmitComputeAvailableFeatures(AWI, AsmWriter, Target, O); - O << "bool " << Target.getName() << ClassName - << "::printAliasInstr(const " << MachineInstrClassName - << " *MI, raw_ostream &OS) {\n"; + std::string Header; + raw_string_ostream HeaderO(Header); + + HeaderO << "bool " << Target.getName() << ClassName + << "::printAliasInstr(const " << MachineInstrClassName + << " *MI, raw_ostream &OS) {\n"; std::string Cases; raw_string_ostream CasesO(Cases); @@ -979,14 +996,18 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { } if (CasesO.str().empty() || !isMC) { + O << HeaderO.str(); O << " return false;\n"; O << "}\n\n"; O << "#endif // PRINT_ALIAS_INSTR\n"; return; } + EmitGetMapOperandNumber(O); + + O << HeaderO.str(); O.indent(2) << "StringRef AsmString;\n"; - O.indent(2) << "std::map<StringRef, unsigned> OpMap;\n"; + O.indent(2) << "SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;\n"; if (NeedAvailableFeatures) O.indent(2) << "unsigned AvailableFeatures = getAvailableFeatures();\n\n"; O.indent(2) << "switch (MI->getOpcode()) {\n"; @@ -1012,7 +1033,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { O << " *I == '_'))\n"; O << " ++I;\n"; O << " StringRef Name(Start, I - Start);\n"; - O << " printOperand(MI, OpMap[Name], OS);\n"; + O << " printOperand(MI, getMapOperandNumber(OpMap, Name), OS);\n"; O << " } else {\n"; O << " OS << *I++;\n"; O << " }\n"; |