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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-24 14:48:12 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-24 14:48:12 +0000
commit73ea7bf4509663267317ec3911aac00ca35a2f2c (patch)
tree706c544a2d423e2ea4ad29029f525d193bd78c16 /utils/TableGen/FastISelEmitter.cpp
parent3816c25fdc03fb2945ecfe4df41e1834ea386245 (diff)
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Add the SubRegIndex TableGen class.
This is the beginning of purely symbolic subregister indices, but we need a bit of jiggling before the explicit numeric indices can be completely removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/FastISelEmitter.cpp')
-rw-r--r--utils/TableGen/FastISelEmitter.cpp19
1 files changed, 11 insertions, 8 deletions
diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp
index ce9d97b8ad..9ec9e08842 100644
--- a/utils/TableGen/FastISelEmitter.cpp
+++ b/utils/TableGen/FastISelEmitter.cpp
@@ -31,7 +31,7 @@ namespace {
struct InstructionMemo {
std::string Name;
const CodeGenRegisterClass *RC;
- unsigned char SubRegNo;
+ std::string SubRegNo;
std::vector<std::string>* PhysRegs;
};
@@ -278,7 +278,7 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
// For now, ignore instructions where the first operand is not an
// output register.
const CodeGenRegisterClass *DstRC = 0;
- unsigned SubRegNo = ~0;
+ std::string SubRegNo;
if (Op->getName() != "EXTRACT_SUBREG") {
Record *Op0Rec = II.OperandList[0].Rec;
if (!Op0Rec->isSubClassOf("RegisterClass"))
@@ -287,8 +287,11 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) {
if (!DstRC)
continue;
} else {
- SubRegNo = static_cast<IntInit*>(
- Dst->getChild(1)->getLeafValue())->getValue();
+ DefInit *SR = dynamic_cast<DefInit*>(Dst->getChild(1)->getLeafValue());
+ if (SR)
+ SubRegNo = getQualifiedName(SR->getDef());
+ else
+ SubRegNo = Dst->getChild(1)->getLeafValue()->getAsString();
}
// Inspect the pattern.
@@ -437,7 +440,7 @@ void FastISelMap::PrintFunctionDefinitions(raw_ostream &OS) {
}
OS << " return FastEmitInst_";
- if (Memo.SubRegNo == (unsigned char)~0) {
+ if (Memo.SubRegNo.empty()) {
Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
OS << "(" << InstNS << Memo.Name << ", ";
OS << InstNS << Memo.RC->getName() << "RegisterClass";
@@ -448,7 +451,7 @@ void FastISelMap::PrintFunctionDefinitions(raw_ostream &OS) {
} else {
OS << "extractsubreg(" << getName(RetVT);
OS << ", Op0, Op0IsKill, ";
- OS << (unsigned)Memo.SubRegNo;
+ OS << Memo.SubRegNo;
OS << ");\n";
}
@@ -532,7 +535,7 @@ void FastISelMap::PrintFunctionDefinitions(raw_ostream &OS) {
OS << " return FastEmitInst_";
- if (Memo.SubRegNo == (unsigned char)~0) {
+ if (Memo.SubRegNo.empty()) {
Operands.PrintManglingSuffix(OS, *Memo.PhysRegs);
OS << "(" << InstNS << Memo.Name << ", ";
OS << InstNS << Memo.RC->getName() << "RegisterClass";
@@ -542,7 +545,7 @@ void FastISelMap::PrintFunctionDefinitions(raw_ostream &OS) {
OS << ");\n";
} else {
OS << "extractsubreg(RetVT, Op0, Op0IsKill, ";
- OS << (unsigned)Memo.SubRegNo;
+ OS << Memo.SubRegNo;
OS << ");\n";
}