Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163878 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 6 insertions, 4 deletions

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 7f9d4061f9..fe16bfbf9d 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -581,12 +581,13 @@ emitRegisterNameString(raw_ostream &O, StringRef AltName,
     StringTable.add(AsmName);
   }
 
-  StringTable.layout();
+  unsigned Entries = StringTable.layout();
   O << "  static const char AsmStrs" << AltName << "[] = {\n";
   StringTable.emit(O, printChar);
   O << "  };\n\n";
 
-  O << "  static const unsigned RegAsmOffset" << AltName << "[] = {";
+  O << "  static const uint" << ((Entries > 0xffff) ? "32" : "16")
+    << "_t RegAsmOffset" << AltName << "[] = {";
   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
     if ((i % 14) == 0)
       O << "\n    ";
diff --git a/utils/TableGen/SequenceToOffsetTable.h b/utils/TableGen/SequenceToOffsetTable.h
index 60202b5ade..a4f16ca9a6 100644
--- a/utils/TableGen/SequenceToOffsetTable.h
+++ b/utils/TableGen/SequenceToOffsetTable.h
@@ -82,9 +82,9 @@ public:
   }
 
   bool empty() const { return Seqs.empty(); }
-  
+
   /// layout - Computes the final table layout.
-  void layout() {
+  unsigned layout() {
     assert(Entries == 0 && "Can only call layout() once");
     // Lay out the table in Seqs iteration order.
     for (typename SeqMap::iterator I = Seqs.begin(), E = Seqs.end(); I != E;
@@ -93,6 +93,7 @@ public:
       // Include space for a terminator.
       Entries += I->first.size() + 1;
     }
+    return Entries;
   }
 
   /// get - Returns the offset of Seq in the final table.