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authorCraig Topper <craig.topper@gmail.com>2014-02-09 07:13:41 +0000
committerCraig Topper <craig.topper@gmail.com>2014-02-09 07:13:41 +0000
commit426497e2fb3a7a6e8bd3184201a1b0bd39014aaa (patch)
treec21adc883bff9f736a787186258a3e8ee69270aa /utils
parent12ea35fc6a64ab4e0d4194a198e01974f76fd2dd (diff)
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Remove some unnecessary code. The conditions it was checking had already been ruled out by the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201039 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/FixedLenDecoderEmitter.cpp7
1 files changed, 0 insertions, 7 deletions
diff --git a/utils/TableGen/FixedLenDecoderEmitter.cpp b/utils/TableGen/FixedLenDecoderEmitter.cpp
index ca1892b682..a8841759ac 100644
--- a/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1705,13 +1705,6 @@ static bool populateInstruction(CodeGenTarget &Target,
// If all the bit positions are not specified; do not decode this instruction.
// We are bound to fail! For proper disassembly, the well-known encoding bits
// of the instruction must be fully specified.
- //
- // This also removes pseudo instructions from considerations of disassembly,
- // which is a better design and less fragile than the name matchings.
- // Ignore "asm parser only" instructions.
- if (Def.getValueAsBit("isAsmParserOnly") ||
- Def.getValueAsBit("isCodeGenOnly"))
- return false;
BitsInit &Bits = getBitsField(Def, "Inst");
if (Bits.allInComplete()) return false;