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-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.cpp10
-rw-r--r--test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll25
2 files changed, 31 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 465d6122aa..0789279133 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1642,7 +1642,15 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
case ARM::ANDrr:
case ARM::ANDri:
case ARM::t2ANDrr:
- case ARM::t2ANDri: {
+ case ARM::t2ANDri:
+ case ARM::ORRrr:
+ case ARM::ORRri:
+ case ARM::t2ORRrr:
+ case ARM::t2ORRri:
+ case ARM::EORrr:
+ case ARM::EORri:
+ case ARM::t2EORrr:
+ case ARM::t2EORri: {
// Scan forward for the use of CPSR, if it's a conditional code requires
// checking of V bit, then this is not safe to do. If we can't find the
// CPSR use (i.e. used in another block), then it's not safe to perform
diff --git a/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll b/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll
index a98d3f6ba9..5404cf57a5 100644
--- a/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll
+++ b/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll
@@ -3,7 +3,7 @@
; CHECK: _f
; CHECK: adds
; CHECK-NOT: cmp
-; CHECK: blxeq _g
+; CHECK: blxeq _h
define i32 @f(i32 %a, i32 %b) nounwind ssp {
entry:
@@ -12,11 +12,30 @@ entry:
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
- tail call void (...)* @g(i32 %a, i32 %b) nounwind
+ tail call void (...)* @h(i32 %a, i32 %b) nounwind
br label %if.end
if.end: ; preds = %if.then, %entry
ret i32 %add
}
-declare void @g(...)
+; CHECK: _g
+; CHECK: orrs
+; CHECK-NOT: cmp
+; CHECK: blxeq _h
+
+define i32 @g(i32 %a, i32 %b) nounwind ssp {
+entry:
+ %add = or i32 %b, %a
+ %cmp = icmp eq i32 %add, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ tail call void (...)* @h(i32 %a, i32 %b) nounwind
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ ret i32 %add
+}
+
+declare void @h(...)