diff options
| -rw-r--r-- | lib/Target/R600/R600ISelLowering.cpp | 10 | ||||
| -rw-r--r-- | test/CodeGen/R600/extload.ll | 51 |
2 files changed, 60 insertions, 1 deletions
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp index 5bb8129677..a236a3e91b 100644 --- a/lib/Target/R600/R600ISelLowering.cpp +++ b/lib/Target/R600/R600ISelLowering.cpp @@ -90,10 +90,16 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : setOperationAction(ISD::LOAD, MVT::i32, Custom); setOperationAction(ISD::LOAD, MVT::v2i32, Custom); setOperationAction(ISD::LOAD, MVT::v4i32, Custom); + + // EXTLOAD should be the same as ZEXTLOAD. It is legal for some address + // spaces, so it is custom lowered to handle those where it isn't. setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Custom); setLoadExtAction(ISD::SEXTLOAD, MVT::i16, Custom); setLoadExtAction(ISD::ZEXTLOAD, MVT::i8, Custom); setLoadExtAction(ISD::ZEXTLOAD, MVT::i16, Custom); + setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom); + setLoadExtAction(ISD::EXTLOAD, MVT::i16, Custom); + setOperationAction(ISD::STORE, MVT::i8, Custom); setOperationAction(ISD::STORE, MVT::i32, Custom); setOperationAction(ISD::STORE, MVT::v2i32, Custom); @@ -1226,7 +1232,9 @@ SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const } int ConstantBlock = ConstantAddressBlock(LoadNode->getAddressSpace()); - if (ConstantBlock > -1 && LoadNode->getExtensionType() != ISD::SEXTLOAD) { + if (ConstantBlock > -1 && + ((LoadNode->getExtensionType() == ISD::NON_EXTLOAD) || + (LoadNode->getExtensionType() == ISD::ZEXTLOAD))) { SDValue Result; if (isa<ConstantExpr>(LoadNode->getSrcValue()) || isa<Constant>(LoadNode->getSrcValue()) || diff --git a/test/CodeGen/R600/extload.ll b/test/CodeGen/R600/extload.ll new file mode 100644 index 0000000000..aa660b3883 --- /dev/null +++ b/test/CodeGen/R600/extload.ll @@ -0,0 +1,51 @@ +; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s + +; EG-LABEL: @anyext_load_i8: +; EG: AND_INT +; EG-NEXT: 255 +define void @anyext_load_i8(i8 addrspace(1)* nocapture noalias %out, i8 addrspace(1)* nocapture noalias %src) nounwind { + %cast = bitcast i8 addrspace(1)* %src to i32 addrspace(1)* + %load = load i32 addrspace(1)* %cast, align 1 + %x = bitcast i32 %load to <4 x i8> + %castOut = bitcast i8 addrspace(1)* %out to <4 x i8> addrspace(1)* + store <4 x i8> %x, <4 x i8> addrspace(1)* %castOut, align 1 + ret void +} + +; EG-LABEL: @anyext_load_i16: +; EG: AND_INT +; EG: LSHL +; EG: 65535 +define void @anyext_load_i16(i16 addrspace(1)* nocapture noalias %out, i16 addrspace(1)* nocapture noalias %src) nounwind { + %cast = bitcast i16 addrspace(1)* %src to i32 addrspace(1)* + %load = load i32 addrspace(1)* %cast, align 1 + %x = bitcast i32 %load to <2 x i16> + %castOut = bitcast i16 addrspace(1)* %out to <2 x i16> addrspace(1)* + store <2 x i16> %x, <2 x i16> addrspace(1)* %castOut, align 1 + ret void +} + +; EG-LABEL: @anyext_load_lds_i8: +; EG: AND_INT +; EG-NEXT: 255 +define void @anyext_load_lds_i8(i8 addrspace(3)* nocapture noalias %out, i8 addrspace(3)* nocapture noalias %src) nounwind { + %cast = bitcast i8 addrspace(3)* %src to i32 addrspace(3)* + %load = load i32 addrspace(3)* %cast, align 1 + %x = bitcast i32 %load to <4 x i8> + %castOut = bitcast i8 addrspace(3)* %out to <4 x i8> addrspace(3)* + store <4 x i8> %x, <4 x i8> addrspace(3)* %castOut, align 1 + ret void +} + +; EG-LABEL: @anyext_load_lds_i16: +; EG: AND_INT +; EG: LSHL +; EG: 65535 +define void @anyext_load_lds_i16(i16 addrspace(3)* nocapture noalias %out, i16 addrspace(3)* nocapture noalias %src) nounwind { + %cast = bitcast i16 addrspace(3)* %src to i32 addrspace(3)* + %load = load i32 addrspace(3)* %cast, align 1 + %x = bitcast i32 %load to <2 x i16> + %castOut = bitcast i16 addrspace(3)* %out to <2 x i16> addrspace(3)* + store <2 x i16> %x, <2 x i16> addrspace(3)* %castOut, align 1 + ret void +} |