diff options
| -rw-r--r-- | lib/Target/ARM/Thumb2SizeReduction.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-cmn.ll | 18 |
2 files changed, 15 insertions, 4 deletions
diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index b5a397e616..f18f491f49 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -67,6 +67,7 @@ namespace { { ARM::t2BICrr, 0, ARM::tBIC, 0, 0, 0, 1, 0,0, 1,0 }, //FIXME: Disable CMN, as CCodes are backwards from compare expectations //{ ARM::t2CMNrr, ARM::tCMN, 0, 0, 0, 1, 0, 2,0, 0,0 }, + { ARM::t2CMNzrr, ARM::tCMNz, 0, 0, 0, 1, 0, 2,0, 0,0 }, { ARM::t2CMPri, ARM::tCMPi8, 0, 8, 0, 1, 0, 2,0, 0,0 }, { ARM::t2CMPrr, ARM::tCMPhir, 0, 0, 0, 0, 0, 2,0, 0,1 }, { ARM::t2EORrr, 0, ARM::tEOR, 0, 0, 0, 1, 0,0, 1,0 }, diff --git a/test/CodeGen/Thumb2/thumb2-cmn.ll b/test/CodeGen/Thumb2/thumb2-cmn.ll index df221b945e..21bbd269ca 100644 --- a/test/CodeGen/Thumb2/thumb2-cmn.ll +++ b/test/CodeGen/Thumb2/thumb2-cmn.ll @@ -9,7 +9,7 @@ define i1 @f1(i32 %a, i32 %b) { ret i1 %tmp } ; CHECK: f1: -; CHECK: cmn.w r0, r1 +; CHECK: cmn r0, r1 define i1 @f2(i32 %a, i32 %b) { %nb = sub i32 0, %b @@ -17,7 +17,7 @@ define i1 @f2(i32 %a, i32 %b) { ret i1 %tmp } ; CHECK: f2: -; CHECK: cmn.w r0, r1 +; CHECK: cmn r0, r1 define i1 @f3(i32 %a, i32 %b) { %nb = sub i32 0, %b @@ -25,7 +25,7 @@ define i1 @f3(i32 %a, i32 %b) { ret i1 %tmp } ; CHECK: f3: -; CHECK: cmn.w r0, r1 +; CHECK: cmn r0, r1 define i1 @f4(i32 %a, i32 %b) { %nb = sub i32 0, %b @@ -33,7 +33,7 @@ define i1 @f4(i32 %a, i32 %b) { ret i1 %tmp } ; CHECK: f4: -; CHECK: cmn.w r0, r1 +; CHECK: cmn r0, r1 define i1 @f5(i32 %a, i32 %b) { %tmp = shl i32 %b, 5 @@ -73,3 +73,13 @@ define i1 @f8(i32 %a, i32 %b) { ; CHECK: f8: ; CHECK: cmn.w r0, r0, ror #8 + +define void @f9(i32 %a, i32 %b) nounwind optsize { + tail call void asm sideeffect "cmn.w r0, r1", ""() nounwind, !srcloc !0 + ret void +} + +!0 = metadata !{i32 81} + +; CHECK: f9: +; CHECK: cmn.w r0, r1 |