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-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp7
-rw-r--r--test/CodeGen/AArch64/func-argpassing.ll3
-rw-r--r--test/CodeGen/X86/divide-by-constant.ll6
3 files changed, 10 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 79ec227a22..39a8e82796 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -7199,12 +7199,15 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) {
// Try to infer better alignment information than the load already has.
if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) {
if (unsigned Align = DAG.InferPtrAlignment(Ptr)) {
- if (Align > LD->getAlignment())
- return DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(),
+ if (Align > LD->getAlignment()) {
+ SDValue NewLoad =
+ DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(),
LD->getValueType(0),
Chain, Ptr, LD->getPointerInfo(),
LD->getMemoryVT(),
LD->isVolatile(), LD->isNonTemporal(), Align);
+ return CombineTo(N, NewLoad, SDValue(NewLoad.getNode(), 1), true);
+ }
}
}
diff --git a/test/CodeGen/AArch64/func-argpassing.ll b/test/CodeGen/AArch64/func-argpassing.ll
index db58798ca5..760c8d49d0 100644
--- a/test/CodeGen/AArch64/func-argpassing.ll
+++ b/test/CodeGen/AArch64/func-argpassing.ll
@@ -178,7 +178,8 @@ define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
; Nothing local on stack in current codegen, so first stack is 16 away
; CHECK: ldr {{x[0-9]+}}, [sp, #16]
; Important point is that we address sp+24 for second dword
-; CHECK: ldr {{x[0-9]+}}, [sp, #24]
+; CHECK: add [[REG:x[0-9]+]], sp, #16
+; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG]], #8]
ret void
}
diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll
index 8e7c13d8ef..9669d97cb7 100644
--- a/test/CodeGen/X86/divide-by-constant.ll
+++ b/test/CodeGen/X86/divide-by-constant.ll
@@ -56,9 +56,9 @@ entry:
%div = sdiv i16 %x, 10
ret i16 %div
; CHECK: test6:
-; CHECK: imull $26215, %eax, %eax
-; CHECK: shrl $31, %ecx
-; CHECK: sarl $18, %eax
+; CHECK: imull $26215, %eax, %ecx
+; CHECK: sarl $18, %ecx
+; CHECK: shrl $15, %eax
}
define i32 @test7(i32 %x) nounwind {