diff options
| -rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll | 24 |
2 files changed, 31 insertions, 2 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index f81f3a70fb..b7de1cfae6 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -200,7 +200,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) { for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end(); - mi != me; ++mi) { + mi != me; ) { + MachineBasicBlock::iterator nmi = next(mi); const TargetInstrDesc &TID = mi->getDesc(); bool FirstTied = true; @@ -298,7 +299,10 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { // then one instruction. Sunk = Sink3AddrInstruction(mbbi, New, regB, mi); mbbi->erase(mi); // Nuke the old inst. - if (!Sunk) mi = New; + if (!Sunk) { + mi = New; + nmi = next(mi); + } ++NumConvertedTo3Addr; // Done with this instruction. break; @@ -337,6 +341,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(*cerr.stream(), &TM)); } + mi = nmi; } } diff --git a/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll new file mode 100644 index 0000000000..1e5ab99a9c --- /dev/null +++ b/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 + +define void @t() { +entry: + %tmp455 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> < i32 1, i32 0, i32 3, i32 2 > ; <<4 x float>> [#uses=1] + %tmp457 = mul <4 x float> zeroinitializer, %tmp455 ; <<4 x float>> [#uses=2] + %tmp461 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] + %tmp465 = shufflevector <4 x float> %tmp457, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1] + %tmp466 = sub <4 x float> %tmp461, %tmp465 ; <<4 x float>> [#uses=1] + %tmp536 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp466, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1] + %tmp542 = shufflevector <4 x float> %tmp536, <4 x float> zeroinitializer, <4 x i32> < i32 6, i32 7, i32 2, i32 3 > ; <<4 x float>> [#uses=1] + %tmp580 = bitcast <4 x float> %tmp542 to <4 x i32> ; <<4 x i32>> [#uses=1] + %tmp582 = and <4 x i32> %tmp580, zeroinitializer ; <<4 x i32>> [#uses=1] + %tmp591 = or <4 x i32> %tmp582, zeroinitializer ; <<4 x i32>> [#uses=1] + %tmp592 = bitcast <4 x i32> %tmp591 to <4 x float> ; <<4 x float>> [#uses=1] + %tmp609 = fdiv <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, %tmp592 ; <<4 x float>> [#uses=1] + %tmp652 = shufflevector <4 x float> %tmp609, <4 x float> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x float>> [#uses=1] + %tmp662 = mul <4 x float> zeroinitializer, %tmp652 ; <<4 x float>> [#uses=1] + %tmp678 = shufflevector <4 x float> %tmp662, <4 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x float>> [#uses=1] + %tmp753 = mul <4 x float> zeroinitializer, %tmp678 ; <<4 x float>> [#uses=1] + %tmp754 = sub <4 x float> zeroinitializer, %tmp753 ; <<4 x float>> [#uses=1] + store <4 x float> %tmp754, <4 x float>* null, align 16 + unreachable +} |