diff options
| -rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 33 | ||||
| -rw-r--r-- | test/CodeGen/X86/fast-isel-x86-64.ll | 13 |
2 files changed, 36 insertions, 10 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 8c46d7f39e..0be9dfa06c 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -78,10 +78,8 @@ private: bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR); - bool X86FastEmitStore(EVT VT, const Value *Val, - const X86AddressMode &AM); - bool X86FastEmitStore(EVT VT, unsigned Val, - const X86AddressMode &AM); + bool X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM); + bool X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM); bool X86FastEmitExtend(ISD::NodeType Opc, EVT DstVT, unsigned Src, EVT SrcVT, unsigned &ResultReg); @@ -225,8 +223,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT, const X86AddressMode &AM, /// and a displacement offset, or a GlobalAddress, /// i.e. V. Return true if it is possible. bool -X86FastISel::X86FastEmitStore(EVT VT, unsigned Val, - const X86AddressMode &AM) { +X86FastISel::X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM) { // Get opcode and regclass of the output for the given store instruction. unsigned Opc = 0; switch (VT.getSimpleVT().SimpleTy) { @@ -1537,9 +1534,25 @@ bool X86FastISel::X86SelectCall(const Instruction *I) { } } - unsigned Arg = getRegForValue(ArgVal); - if (Arg == 0) - return false; + unsigned ArgReg; + if (ArgVal->getType()->isIntegerTy(1) && isa<TruncInst>(ArgVal) && + cast<TruncInst>(ArgVal)->getParent() == I->getParent() && + ArgVal->hasOneUse()) { + // Passing bools around ends up doing a trunc to i1 and passing it. + // Codegen this as an argument + "and 1". + ArgVal = cast<TruncInst>(ArgVal)->getOperand(0); + ArgReg = getRegForValue(ArgVal); + if (ArgReg == 0) return false; + + MVT ArgVT; + if (!isTypeLegal(ArgVal->getType(), ArgVT)) return false; + + ArgReg = FastEmit_ri(ArgVT, ArgVT, ISD::AND, ArgReg, + ArgVal->hasOneUse(), 1); + } else { + ArgReg = getRegForValue(ArgVal); + if (ArgReg == 0) return false; + } // FIXME: Only handle *easy* calls for now. if (CS.paramHasAttr(AttrInd, Attribute::InReg) || @@ -1555,7 +1568,7 @@ bool X86FastISel::X86SelectCall(const Instruction *I) { unsigned OriginalAlignment = TD.getABITypeAlignment(ArgTy); Flags.setOrigAlign(OriginalAlignment); - Args.push_back(Arg); + Args.push_back(ArgReg); ArgVals.push_back(ArgVal); ArgVTs.push_back(ArgVT); ArgFlags.push_back(Flags); diff --git a/test/CodeGen/X86/fast-isel-x86-64.ll b/test/CodeGen/X86/fast-isel-x86-64.ll index 2e6bafe072..508af25772 100644 --- a/test/CodeGen/X86/fast-isel-x86-64.ll +++ b/test/CodeGen/X86/fast-isel-x86-64.ll @@ -157,3 +157,16 @@ define void @test13() nounwind { ; CHECK-NEXT: callq } + + +; rdar://9297003 - fast isel bails out on all functions taking bools +define void @test14(i8 %tmp) nounwind ssp noredzone { +entry: + %tobool = trunc i8 %tmp to i1 + call void @test13f(i1 zeroext %tobool) noredzone + ret void +; CHECK: test14: +; CHECK: andb $1, +; CHECK: callq +} + |